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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > AD9951YSVZ

AD9951YSVZ 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2024/1/25 14:23:31 鏌ョ湅 闁辫畝锛�646

AD9951YSVZ鏄竴绋洿鎺ユ暩(sh霉)瀛楀悎鎴愬櫒锛圖DS锛�锛屽叿鏈夐珮閬�(d谩)400 MSPS鐨�14浣岲AC銆侫D9951YSVZ閲囩敤鍏堥��(j矛n)鐨凞DS鎶�琛�(sh霉)锛岀祼(ji茅)鍚堝収(n猫i)閮ㄩ珮閫�銆侀珮鎬ц兘DAC锛屽舰鎴愪竴鍊嬫暩(sh霉)瀛楀彲绶ㄧ▼鐨勫畬鏁撮珮闋诲悎鎴愬櫒锛岃兘澶犲湪楂橀仈(d谩)200 MHz鐨勯牷鐜囪寖鍦嶅収(n猫i)鐢�(ch菐n)鐢熼牷鐜囨嵎璁婄殑妯℃摤杓稿嚭姝ｅ鸡娉㈠舰銆侫D9951YSVZ瑷�(sh猫)瑷堢敤浜庢彁渚涘揩閫熻烦闋诲拰寰(di脿o)鍒嗚鲸鐜囷紙32浣嶉牷鐜囪(di脿o)璜у瓧锛夈�傞牷鐜囪(di脿o)璜у拰鎺у埗瀛楅�氶亷涓茶I/O绔彛鍔犺級鍒癆D9951涓�銆侫D9951YSVZ鎸囧畾鍦�-40掳C鑷�+105掳C鐨勬摯(ku貌)灞曞伐妤�(y猫)婧害鑼冨湇鍏�(n猫i)宸ヤ綔銆�

鍙冩暩(sh霉)

椤炲垾锛氶泦鎴愰浕璺�(IC)
銆�銆�瀹跺涵锛氭帴鍙�-鐩存帴鏁�(sh霉)瀛楀悎鎴�(DDS)
銆�銆�鍒嗚鲸鐜囷紙浣嶏級锛�14 b
銆�銆�涓籪clk锛�400MHz
銆�銆�瑾�(di脿o)绡�(ji茅)瀛楀锛堜綅锛夛細32 b
銆�銆�闆绘簮闆诲锛�1.71 V~1.96 V
銆�銆�闆绘簮闆诲(DC)锛�1.80 V
銆�銆�杓稿嚭鎺ュ彛鏁�(sh霉)锛�
銆�銆�杓稿嚭闆绘祦锛�10 mA
銆�銆�閫氶亾鏁�(sh霉)锛�
銆�銆�閲濊叧鏁�(sh霉)锛�48
銆�銆�鏁�(sh霉)鎿�(j霉)閫熺巼锛�25.0 Mbps
銆�銆�鍒嗚鲸鐜�(Bits)锛�14.0
銆�銆�宸ヤ綔婧害(Max)锛�105鈩�
銆�銆�宸ヤ綔婧害(Min)锛�-40鈩�
銆�銆�鏁�(sh霉)妯¤綁(zhu菐n)鎻涙暩(sh霉)(DAC)锛�
銆�銆�寮曡叧鏁�(sh霉)锛�48
銆�銆�闀峰害锛�7 mm
銆�銆�瀵害锛�7 mm
銆�銆�楂樺害锛�1 mm
銆�銆�宸ヤ綔婧害锛�-40鈩儈105鈩�
銆�銆�瀹夎椤炲瀷锛氳〃闈㈣布瑁�
銆�銆�灏佽/澶栨锛�48-TQFP,48-eTQFP,48-HTQFP,48-VQFP
銆�銆�鍖呰锛氭墭鐩�

鐗规��

400 MSPS鍏�(n猫i)閮ㄦ檪閻橀�熷害闆嗘垚
銆�銆�14浣岲AC
銆�銆�32浣嶈(di脿o)璜у瓧鐩镐綅鍣伈鈮も��120 dBc/Hz 1 kHz鍋忕Щ锛圖AC杓稿嚭锛�
銆�銆�鍗撹秺鐨勫嫊鎱�(t脿i)鎬ц兘>80 dB SFDR 160 MHz锛埪�100 kHz鍋忕Щ锛�
銆�銆�AOUT涓茶I/O鎺у埗
銆�銆�1.8 V闆绘簮
銆�銆�杌熶欢鍜岀‖浠舵帶鍒舵柗闆�
銆�銆�48灏�(d菐o)TQFP/EP灏佽
銆�銆�鏀寔澶у鏁�(sh霉)鏁�(sh霉)瀛楄几鍏ヤ笂鐨�5 V杓稿叆闆诲钩
銆�銆�PLL REFCLK鍊嶅鍣紙4脳鑷�20脳锛�
銆�銆�鍏�(n猫i)閮ㄦ尟钑╁櫒锛屽彲鐢卞柈鏅堕﹨(q奴)鍕�
銆�銆�鐩镐綅瑾�(di脿o)鍒惰兘鍔�
銆�銆�澶氳姱鐗囧悓姝�

ad9951ysvz鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児

ad9951ysvz璩囨枡 鏇村>

  • 鍨嬭櫉
  • 鎻忚堪
  • 鍝佺墝
  • 闁辫涓嬭級

ad9951ysvz鍙冩暩(sh霉)

  • 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″Direct Digital Synthesis Tutorial Series (1 of 7): IntroductionDirect Digital Synthesizer Tutorial Series (7 of 7): DDS in ActionDirect Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude ConverterDirect Digital Synthesis Tutorial Series (6 of 7): SINC Envelope CorrectionDirect Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog ConverterDirect Digital Synthesis Tutorial Series (2 of 7): The Accumulator
  • 妯�(bi膩o)婧�(zh菙n)鍖呰1
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵鎺ュ彛 - 鐩存帴鏁�(sh霉)瀛楀悎鎴� (DDS)
  • 绯诲垪-
  • 鍒嗚鲸鐜囷紙浣嶏級14 b
  • 涓� fclk400MHz
  • 瑾�(di脿o)绡�(ji茅)瀛楀锛堜綅锛�32 b
  • 闆绘簮闆诲1.71 V ~ 1.96 V
  • 宸ヤ綔婧害-40°C ~ 105°C
  • 瀹夎椤炲瀷琛ㄩ潰璨艰
  • 灏佽/澶栨48-TQFP 瑁搁湶鐒婄洡
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�48-TQFP 瑁搁湶鐒婄洡锛�7x7锛�
  • 鍖呰鎵樼洡