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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > CC1350F128RGZR

CC1350F128RGZR 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2023/7/21 19:58:59 鏌ョ湅 闁辫畝锛�431

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�(h脿o)

CC1350F128RGZR

鎻忚堪

闆嗘垚闆昏矾RF TXRX + MCU BLUETOOTH 48VQFN

鍒嗛(l猫i)

RF / IF鍜孯FID锛屽皠闋绘敹鐧�(f膩)鍣↖C

鍒堕�犲晢

寰峰窞鍎�鍣�

绯诲垪

SimpleLink?

鎵撳寘

鍒囧壊甯�(CT)

闆朵欢鐙�鎱�(t脿i)

娲绘��

闆诲-闆绘簮

1.8V?3.8V

宸ヤ綔婧害

-40掳C?85掳C

鍖呰/绠�

48-VFQFN瑁搁湶鐒婄洡(p谩n)

渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�

48 VQFN(7x7)

鍩烘湰闆朵欢铏�(h脿o)

CC1350

鐢�(ch菐n)鍝佸湒鐗�

CC1350F128RGZR

CC1350F128RGZR

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍒堕�犲晢鍖呰瑾�(shu艒)鏄�

VQFN-48

绗﹀悎REACH

鏄�

绗﹀悎姝愮洘RoHS

鏄�

绗﹀悎涓湅(gu贸)RoHS

鏄�

鐙�鎱�(t脿i)

娲绘��

椤�(l猫i)鍨�

TxRx + MCU

灏勯牷绯诲垪/妯�(bi膩o)婧�(zh菙n)

钘�(l谩n)鐗�

鍗�(xi茅)璀�

钘�(l谩n)鐗檝4.2

ADC閫氶亾

鏄�

鍦板潃绺界窔瀵害

0.0

浣嶅ぇ灏�

32

DMA閫氶亾

鏄�

澶栭儴鏁�(sh霉)鎿�(j霉)绺界窔瀵害

0.0

JESD-30浠ｇ⒓

S-PQCC-N48

JESD-609浠ｇ⒓

e4

I / O绶氭暩(sh霉)

30.0

绔瓙鏁�(sh霉)

48

鐗囦笂绋嬪簭ROM瀵害

8.0

鏈�浣庡伐浣滄韩搴�

-40鈩�

鏈�楂樺伐浣滄韩搴�

85鈩�

鍖呰涓婚珨鏉愭枡

濉戞枡/鐠�(hu谩n)姘фü(sh霉)鑴�

鍖呰浠ｇ⒓

HVQCCN

鍖呰褰㈢媭

鍥涙柟褰�

鍖呰褰㈠紡

鑺墖杓夐珨锛屾暎鐔辩墖/濉炲瓙锛岃吉寤撴サ钖�

宄板�煎洖娴佹韩搴�(鈩�)

260

PWM閫氶亾

鏄�

RAM(瀛楃瘈(ji茅))

20480.0

ROM鍙法绋嬫��

闁�

ROM(瀛�)

131072

搴ч珮

1.0姣背

閫熷害

48.0鍏嗚但

闆绘簮闆诲妯�(bi膩o)绋�

3.0浼�

鏈�灏忎緵闆婚浕澹�

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琛ㄩ潰璨艰

鎶�琛�(sh霉)

CMOS

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鐢�(ch菐n)妤�(y猫)

绲傜瀹屾垚

閹�/閳�/閲�(Ni / Pd / Au)

绲傜琛ㄦ牸

鐒�(w煤)閴�

绔瓙闁撹窛

0.5姣背

绲傜浣嶇疆

QUAD

鏅�(sh铆)闁揁宄板�煎洖娴佹韩搴︽渶澶у��(绉�)

鏈(bi膩o)鏄�

闀�(zh菐ng)搴�

7.0姣背

瀵害

7.0姣背

闄勫姞鍔熻兘

渚�32.768KHZ妯�(bi膩o)绋辨櫠楂旀檪(sh铆)閻�

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛(l猫i)

RoHS鐙�鎱�(t脿i)

绗﹀悎ROHS3

姘村垎鏁忔劅鎬ф按骞�(MSL)

3(168灏忔檪(sh铆))

鐗归粸(di菐n)

鈼忎笘鐣屼笂绗竴鍊�(g猫)闆欓牷(浣庝簬1 GHz鍜�2.4 GHz)鐒�(w煤)绶氬井鎺у埗鍣�

鈼忓井鎺у埗鍣�

銆傚挤(qi谩ng)澶х殑ARM?Cortex?-M3

銆侲EMBCCoreMark?寰楀垎锛�142

銆侲EMBC ULPBench?寰楀垎锛�158

銆傛檪(sh铆)閻橀�熷害楂橀仈(d谩)48MHz

銆�128KB鐨勭郴绲�(t菕ng)鍏�(n猫i)鍙法绋嬮杻瀛�

銆�8KB SRAM鐢ㄤ簬楂橀�熺珐瀛�(鎴栦綔鐐洪�氱敤RAM)

銆�20KB瓒呬綆娉勬紡SRAM

銆�2寮曡叧cJTAG鍜孞TAG瑾�(di脿o)瑭�

銆傛敮鎸佺┖涓�(OTA)鏇存柊

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?锛熸ⅱ瑭崡鍒皔(t菕ng)鍏朵綑閮ㄥ垎鑷富閬�(y霉n)琛�

銆�16浣嶆灦妲�(g貌u)

銆�2KB鐢ㄤ簬浠ｇ⒓鍜屾暩(sh霉)鎿�(j霉)鐨勮秴浣庢硠婕廠RAM

鈼忛珮鏁堢殑浠ｇ⒓澶у皬鏋舵(g貌u)锛屽皣TI-RTOS鐨勫悇鍊�(g猫)閮ㄥ垎锛岄﹨(q奴)鍕�(d貌ng)绋嬪簭锛孊luetooth?浣庤兘鑰楁帶鍒跺櫒鍜孊ootloader鏀惧湪ROM涓�

鈼忕鍚圧oHS鐨勫皝瑁�

銆�7姣背脳7姣背R(sh铆)GZ VQFN48(30鍊�(g猫)GPIO)

鈼忓懆閭婅ō(sh猫)鍌�

銆傛墍鏈夋暩(sh霉)瀛楀瑷�(sh猫)寮曡叧閮藉彲浠ヨ矾鐢辫嚦浠讳綍GPIO

銆傚洓鍊�(g猫)閫氱敤瀹氭檪(sh铆)鍣ㄦā濉�(鍏��(g猫)16浣嶆垨鍥涘��(g猫)32浣嶅畾鏅�(sh铆)鍣�锛屾瘡鍊�(g猫)PWM)

銆�12浣岮DC锛�200 ksamples / s锛�8閫氶亾妯℃摤MUX

銆傞�ｇ簩(x霉)鏅�(sh铆)闁撴瘮杓冨櫒

銆傝秴浣庡姛鑰楁檪(sh铆)閻樻瘮杓冨櫒

銆傚彲绶ㄧ▼闆绘祦婧�

銆備覆鍙�

銆�2鍊�(g猫)SSI(SPI锛孧ICROWIRE锛孴I)

銆侷2C锛孖2S

銆傚(sh铆)鏅�(sh铆)鏅�(sh铆)閻�(RTC)

銆侫ES-128瀹夊叏妯″

銆傜湡闅ㄦ(j墨)鏁�(sh霉)鐧�(f膩)鐢熷櫒(TRNG)

銆傛敮鎸佸叓鍊�(g猫)闆诲寮忔劅鎳�(y墨ng)鎸夐垥

銆傞泦鎴愭韩搴﹀偝鎰熷櫒

鈼忓閮ㄧ郴绲�(t菕ng)

銆傜墖涓婂収(n猫i)閮―C-DC杞�(zhu菐n)鎻涘櫒

銆傝垏SimpleLink?CC1190鍜孋C2592鑼冨湇鎿�(ku貌)灞曞櫒鐨勭劇(w煤)绺泦鎴�

鈼忎綆闆婚噺

銆傚闆绘簮闆诲鑼冨湇锛�1.8鑷�3.8 V

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銆傚湪+10 dBm鏅�(sh铆)鐧�(f膩)灏勶細13.4 mA(Sub-1 GHz)

銆備互+9 dBm鐧�(f膩)灏勶細22.3 mA(钘�(l谩n)鐗欎綆鍔熻��锛�2.4 GHz)

銆傚湪+0 dBm鏅�(sh铆)鐧�(f膩)灏勶細10.5 mA(钘�(l谩n)鐗欎綆鍔熻��锛�2.4 GHz)

銆傛湁婧愭ā寮廙CU 48 MHz閬�(y霉n)琛孋oremark锛�2.5 mA(51 渭A / MHz)

銆備富鍕�(d貌ng)妯″紡MCU锛�48.5 CoreMark / mA

銆�24 MHz鏅�(sh铆)鐨勬湁婧愭ā寮忓偝鎰熷櫒鎺у埗鍣細0.4 mA + 8.2 渭A / MHz

銆傚偝鎰熷櫒鎺у埗鍣�锛屾瘡绉掑煼(zh铆)琛屼竴娆″枤閱掞紝鍩�(zh铆)琛屼竴娆�12浣岮DC閲囨ǎ锛�0.95 渭A

銆傚緟姗�(j墨)锛�0.7 渭A(RTC閬�(y霉n)琛屼互鍙奟AM鍜孋PU淇濈暀)

銆傞棞(gu膩n)鏂凤細185 nA(澶栭儴浜嬩欢鍠氶啋)

CAD妯″瀷

CC1350F128RGZR绗﹁櫉(h脿o)

CC1350F128RGZR绗﹁櫉(h脿o)

CC1350F128RGZR鑵冲嵃

CC1350F128RGZR鑵冲嵃

cc1350f128rgzr鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

cc1350f128rgzr鍦栫墖

cc1350f128rgzr

cc1350f128rgzr鍙冩暩(sh霉)

  • 鐝�(xi脿n)鏈夋暩(sh霉)閲�0鐝�(xi脿n)璨ㄦ煡鐪嬩氦鏈�
  • 鍍�(ji脿)鏍�1 : 锟�61.29000鍓垏甯讹紙CT锛�2,500 : 锟�38.30263鍗峰付锛圱R锛�
  • 绯诲垪SimpleLink?
  • 鍖呰鍗峰付锛圱R锛夊壀鍒囧付锛圕T锛塂igi-Reel? 寰楁嵎瀹氬埗鍗峰付
  • 鐢�(ch菐n)鍝佺媭鎱�(t脿i)鍦ㄥ敭
  • 椤�(l猫i)鍨�TxRx + MCU
  • 灏勯牷绯诲垪/妯�(bi膩o)婧�(zh菙n)钘�(l谩n)鐗�
  • 鍗�(xi茅)璀�钘�(l谩n)鐗� v4.2
  • 瑾�(di脿o)鍒�GFSK
  • 闋荤巼2.4GHz
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  • 鍔熺巼 - 杓稿嚭14dBm
  • 闈堟晱搴�-124dBm
  • 瀛樺劜(ch菙)瀹归噺128kB 闁冨瓨锛�28kB SRAM
  • 涓茶鎺ュ彛I2C锛孖2S锛孲PI锛孶ART
  • GPIO30
  • 闆诲 - 渚涢浕1.8V ~ 3.8V
  • 闆绘祦 - 鎺ユ敹5.4mA ~ 6.4mA
  • 闆绘祦 - 鍌宠几13.4mA ~ 24.4mA
  • 宸ヤ綔婧害-40掳C ~ 85掳C
  • 瀹夎椤�(l猫i)鍨�琛ㄩ潰璨艰鍨�
  • 灏佽/澶栨48-VFQFN 瑁搁湶鐒婄洡(p谩n)
  • 渚涙噳(y墨ng)鍟嗗櫒浠跺皝瑁�48-VQFN锛�7x7锛�