鏅傞枔锛�2025/5/12 12:26:53
闁辫畝锛�26
CDCE949PWR 鏄竴娆鹃珮鎬ц兘銆佷綆鎶栧嫊鐨勬檪閻樼珐娌栧櫒鍜屾墖鍑洪﹨(q奴)鍕曞櫒锛屽皥鐐洪渶瑕侀珮绮惧害鏅傞悩淇¤櫉鐨勬噳鐢ㄨō(sh猫)瑷�銆傝┎鍣ㄤ欢鏀寔澶氱ó杓稿叆鏅傞悩婧�锛屽苟鎻愪緵澶氳矾杓稿嚭浠ラ﹨(q奴)鍕曞鍊嬭矤杓夈�傚叾涓昏鐗归粸鏄叿鏈夊嚭鑹茬殑鐩镐綅鍣伈鎬ц兘鍜屼綆鎶栧嫊鐗规��锛岄仼鐢ㄤ簬閫氫俊绯荤当(t菕ng)銆佹暩(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒鍚屾浠ュ強鍏朵粬灏嶆檪閻樹俊铏熻唱(zh矛)閲忚姹傝純楂樼殑鍫存櫙銆�
銆�銆�CDCE949PWR 鎻愪緵闈堟椿鐨勯厤缃伕闋�锛屽彲浠ラ�氶亷寮曡叧瑷�(sh猫)缃垨澶栭儴鍏冧欢瑾�(di脿o)鏁翠締鍎�(y艒u)鍖栨檪閻樺垎閰嶇恫(w菐ng)绲�(lu貌)鐨勬�ц兘銆�
宸ヤ綔闆诲锛�1.8V 鑷� 3.3V
銆�銆�杓稿叆闋荤巼鑼冨湇锛�10kHz 鑷� 150MHz
銆�銆�杓稿嚭閫氶亾鏁�(sh霉)锛�
銆�銆�杓稿嚭椤炲瀷锛歀VPECL/LVDS/CML/HSTL
銆�銆�鎶栧嫊锛堝吀鍨嬪�硷級锛�25fs RMS
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�灏佽褰㈠紡锛歍QFP-48
CDCE949PWR 鍏锋湁浠ヤ笅椤憲鐗规�э細
銆�銆�1. 鏀寔澶氱ó鏅傞悩杓稿叆妯欐簴锛屽寘鎷� CMOS銆丩VPECL 鍜� LVCMOS銆�
銆�銆�2. 鎻愪緵澶氶仈 9 璺彲閰嶇疆鐨勮几鍑�锛岃兘澶犻仼鎳変笉鍚岀殑鏅傞悩鍒嗛厤闇�姹�銆�
銆�銆�3. 杓稿嚭鎶栧嫊妤典綆锛岄仼鍚堢敤浜庨珮绮惧害 ADC/DAC 鍚屾銆丗PGA 鎴� ASIC 鏅傞悩鍒嗛厤绛夋噳鐢�銆�
銆�銆�4. 鍏�(n猫i)缃� PLL 鍔熻兘锛屽彲瀵︾従(xi脿n)鍊嶉牷鎴栧垎闋绘搷浣�銆�
銆�銆�5. 鎻愪緵澶氱ó闆绘簮绠＄悊閬搁爡锛屾湁鍔╀簬闄嶄綆鍔熻�椼��
銆�銆�6. 宸ヤ綔婧害鑼冨湇瀵唬锛岀⒑淇濆湪鍚勭ó鐠�(hu谩n)澧冧笅鐨勭┅(w臎n)瀹氭��銆�
銆�銆�7. 灏佽灏忓阀锛屼究浜庡湪绌洪枔鍙楅檺鐨勮ō(sh猫)瑷堜腑浣跨敤銆�
CDCE949PWR 寤ｆ硾鎳夌敤浜庝互涓嬮牁(l菒ng)鍩燂細
銆�銆�1. 閫氫俊瑷�(sh猫)鍌欎腑鐨勬檪閻樺垎閰嶈垏鍚屾銆�
銆�銆�2. 楂橀�熸暩(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛圓DC/DAC锛夌殑鏅傞悩椹�(q奴)鍕�銆�
銆�銆�3. FPGA 鍜� ASIC 鐨勫弮鑰冩檪閻樼敓鎴愩��
銆�銆�4. 缍�(w菐ng)绲�(lu貌)瑷�(sh猫)鍌欎腑鐨勪綆鎶栧嫊鏅傞悩婧�銆�
銆�銆�5. 娓│鑸囨脯閲忓剙鍣ㄤ腑鐨勭簿瀵嗘檪閻樿В姹烘柟妗�銆�
銆�銆�6. 瑕栭牷铏曠悊绯荤当(t菕ng)鐨勫悓姝ユ檪閻樼敓鎴�銆�
銆�銆�7. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌欎腑鐨勯珮绮惧害鏅傞悩鎺у埗銆�
CDCE913PWR, CDCE72010PWR, SN65DUXxxx 绯诲垪
