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鍏�(n猫i)鏍革細ARM Cortex-M0+
銆€銆€涓婚牷锛�24 MHz
銆€銆€闁冨瓨锛�64 KB
銆€銆€SRAM锛�8 KB
銆€銆€GPIO 鏁�(sh霉)閲忥細24
銆€銆€宸ヤ綔闆诲锛�1.8V - 3.8V
銆€銆€灏佽褰㈠紡锛歈FN32
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆€銆€I/O 鑰愬锛�5V
銆€銆€澶栬ō(sh猫)锛歎ART銆両2C銆丼PI銆丄DC銆丏AC

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