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鍨嬭櫉锛欵P2AGX260EF29I3N
銆�銆�鍝佺墝锛欰ltera锛圛ntel FPGA锛�
銆�銆�绯诲垪锛欰rria GX
銆�銆�宸ヨ棟锛�90nm
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銆�銆�閰嶇疆瀛樺劜鍣ㄩ鍨嬶細Flash
銆�銆�鐢ㄦ埗鍙敤RAM浣嶆暩(sh霉)锛�5,721,600 bits
銆�銆�DSP濉婃暩(sh霉)閲忥細240
銆�銆�I/O寮曡叧鏁�(sh霉)閲忥細684
銆�銆�宸ヤ綔闆诲锛�1.2V鏍稿績闆诲锛�3.3V/2.5V/1.8V/1.5V I/O闆诲
銆�銆�灏佽褰㈠紡锛欶BGA 1152
EP2AGX260EF29I3N鍏锋湁浠ヤ笅椤憲鐗规�э細
銆�銆�1. 楂樺瘑搴﹂倧杓硣婧愶細鍖呭惈澶х磩260K鍊嬮倧杓柈鍏冿紝閬╁悎寰╅洔鐨勬暩(sh霉)瀛楅浕璺ō瑷�銆�
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銆�銆�7. 浣庡姛鑰楁灦妲嬶細閲囩敤Stratix II GX鐩稿悓鐨勪綆鍔熻�楁妧琛擄紝鏈夋晥闄嶄綆鏁撮珨鑳借��銆�
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EP2AGX260EF29I3N寤ｆ硾鎳夌敤浜庝互涓嬪咕鍊嬮牁鍩燂細
銆�銆�1. 閫氫俊瑷倷锛氬鍩虹珯鎺у埗鍣�銆佽矾鐢卞櫒鍜屼氦鎻涙绛夛紝鍒╃敤鍏跺挤澶х殑骞惰铏曠悊鑳藉姏鍜岄珮閫熸帴鍙ｅ鐝�(xi脿n)楂樻晥鐨勬暩(sh霉)鎿�(j霉)鍌宠几銆�
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銆�銆�5. 娓│娓噺锛氱敤浜庨珮鎬ц兘绀烘尝鍣�銆佷俊铏熺櫦(f膩)鐢熷櫒绛夋脯瑭﹁ō鍌欎腑鐨勬暩(sh霉)鎿�(j霉)閲囬泦鑸囧垎鏋愰儴鍒�銆�
EP2AGX260KF29I3, EP2AGX260GF29C3
