EP2AGX260FF35C6N 鏅傞枔锛�2025/4/3 15:39:55 闁辫畝锛�44

EP2AGX260FF35C6N 鏄竴娆剧敱 Altera锛堢従(xi脿n)鐐� Intel FPGA 閮ㄩ杸锛夌敓鐢�(ch菐n)鐨勯珮绔� FPGA 鑺墖锛屽爆浜� Arria GX 绯诲垪銆傝┎绯诲垪 FPGA 灏堢偤楂樻€ц兘銆佷綆鍔熻€楃殑鎳�(y墨ng)鐢ㄥ牬鏅ō(sh猫)瑷�锛岄仼鐢ㄤ簬閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂姐€佸唬鎾闋昏檿鐞�銆佸伐妤�(y猫)鑷嫊鍖栦互鍙婅粛浜嬫噳(y墨ng)鐢ㄧ瓑闋�(l菒ng)鍩�銆�
銆€銆€Arria GX 绯诲垪闆嗘垚浜嗚睈瀵岀殑鏁�(sh霉)瀛椾俊铏熻檿鐞� (DSP) 妯″鍜岄珮閫熸敹鐧�(f膩)鍣�锛岃兘澶犳豢瓒冲京(f霉)闆滅郴绲�(t菕ng)鐨勮▓绠楅渶姹傘€侲P2AGX260FF35C6N 鐗瑰垾閬╁悎闇€瑕侀珮閭忚集瀵嗗害鍜屽ぇ瀹归噺瀛樺劜鐨勬噳(y墨ng)鐢ㄥ牬鍚�銆�

鍙冩暩(sh霉)

鍨嬭櫉锛欵P2AGX260FF35C6N
銆€銆€鍝佺墝锛欰ltera (Intel FPGA)>灏佽锛欶F35C6N
銆€銆€I/O 鏁�(sh霉)閲忥細768
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細260K
銆€銆€閰嶇疆瀛樺劜椤炲瀷锛氶杻瀛�
銆€銆€宸ヤ綔闆诲锛�1.2V 鏍稿績闆诲 / 1.5V I/O 闆诲
銆€銆€鏈€澶у伐浣滈牷鐜囷細400 MHz
銆€銆€婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆€銆€鏀剁櫦(f膩)鍣ㄩ€熺巼锛�3.125 Gbps
銆€銆€鍏�(n猫i)閮� RAM锛氱磩 12 Mb

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銆€銆€1. 鍏�(n猫i)缃‖鏍� IP 妯″锛屽 PCIe 鍜屽崈鍏嗕互澶恫(w菐ng) MAC锛屾湁鍔╀簬绨″寲瑷�(sh猫)瑷堟祦绋嬪苟闄嶄綆闁嬬櫦(f膩)闆ｅ害銆�
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銆€銆€5. 鍏�(n猫i)閮ㄥ祵鍏ュ紡瀛樺劜璩囨簮璞愬瘜锛屼究浜庡鐝�(xi脿n)寰�(f霉)闆滅殑绠楁硶鍜屾暩(sh霉)鎿�(j霉)绶╂矕鍔熻兘銆�
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銆€銆€7. 鎻愪緵鍏ㄩ潰鐨勬檪閻樼鐞嗗伐鍏�锛屾敮鎸� PLL 鍜� DLL 鐨勯潏娲婚厤缃�銆�

鎳�(y墨ng)鐢�

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