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EP2S30F484I5N 鏄� Altera 鍏徃锛堢従(xi脿n)宸茶 Intel 鏀惰臣锛夋帹鍑虹殑涓�娆� Cyclone II 绯诲垪 FPGA 鑺墖銆傝┎绯诲垪鑺墖涓昏闈㈠悜涓綆绔噳鐢ㄥ競鍫�锛屽叿鏈夐珮鎬у児姣斿拰浣庡姛鑰楃殑鐗归粸銆侲P2S30F484I5N 鎻愪緵璞愬瘜鐨勯倧杓硣婧�銆佸祵鍏ュ紡瀛樺劜鍣ㄥ浠ュ強鏁�(sh霉)瀛椾俊铏熻檿鐞嗗姛鑳�锛岄仼鍚堢敤浜庨�氫俊銆佸伐妤�(y猫)鎺у埗銆佹秷璨婚浕瀛愬強姹借粖闆诲瓙绛夐牁鍩�銆�
銆�銆�瑭插櫒浠堕噰鐢� 90nm 宸ヨ棟鍒堕��锛屽皝瑁濆舰寮忕偤 FFG484锛屽伐浣滄韩搴﹁寖鍦嶅緸 -40掳C 鍒� +85掳C锛岄仼鐢ㄤ簬鍟嗘キ(y猫)绱氬拰宸ユキ(y猫)绱氱挵(hu谩n)澧冦��
鍨嬭櫉锛欵P2S30F484I5N
銆�銆�绯诲垪锛欳yclone II
銆�銆�鍝佺墝锛欰ltera (Intel)
銆�銆�閭忚集鍠厓鏁�(sh霉)锛�29,184
銆�銆�RAM 绺介噺锛�278Kbits
銆�銆�DSP 妯″鏁�(sh霉)閲忥細鐒�
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�302
銆�銆�閰嶇疆妯″紡锛氫富鍕曚覆琛� (AS) / 琚嫊涓茶 (PS)
銆�銆�宸ヤ綔闆诲锛�1.5V 鏍稿績闆诲锛�3.3V I/O 闆诲
銆�銆�灏佽褰㈠紡锛欶FG484
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
EP2S30F484I5N 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘鑸囦綆鍔熻�楃殑瀹岀編绲愬悎锛屼娇鍏堕潪甯搁仼鍚堝皪鎴愭湰鏁忔劅鐨勬噳鐢ㄥ牬鏅�銆�
銆�銆�2. 鍏х疆璞愬瘜鐨勫彲绶ㄧ▼閭忚集璩囨簮锛屾敮鎸佸京闆滅殑鏁�(sh霉)瀛椾俊铏熻檿鐞嗗拰鏁�(sh霉)鎿氶�氳矾瑷▓銆�
銆�銆�3. 鎻愪緵澶氶仈 302 鍊嬬敤鎴跺彲鐢� I/O 寮曡叧锛屾豢瓒冲鎺ュ彛闇�姹傘��
銆�銆�4. 鏀寔澶氱ó閰嶇疆妯″紡锛屽寘鎷富鍕曚覆琛� (AS) 鍜岃鍕曚覆琛� (PS)锛屼究浜庨潏娲婚伕鎿�銆�
銆�銆�5. 鍏у祵澶氶仈 278Kbits 鐨� RAM 濉�锛屽彲鐢ㄤ簬瀵︾従(xi脿n) FIFO 绶╂矕鍗�(q奴)銆佹煡鎵捐〃绛夊姛鑳�銆�
銆�銆�6. 鏀寔閮ㄥ垎閲嶆柊閰嶇疆鍔熻兘锛屽厑瑷卞湪閬嬭鏅傛洿鏂扮壒瀹氬崁(q奴)鍩熻�屼笉褰遍熆鍏朵粬閮ㄥ垎鐨勬甯告搷浣�銆�
銆�銆�7. 鎻愪緵 JTAG 閭婄晫鎺冩弿鍔熻兘锛屼究浜庢脯瑭﹀拰瑾胯│銆�
銆�銆�8. 鍏锋湁寮峰ぇ鐨勫祵鍏ュ紡涔樻硶鍣ㄦā濉婏紝鑳藉楂樻晥鍩�(zh铆)琛屽悇绋� DSP 閬嬬畻浠诲嫏銆�
EP2S30F484I5N 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 鏁�(sh霉)鎿氶�氫俊瑷倷锛屽璺敱鍣ㄣ�佷氦鎻涙鍜岀恫绲℃帴鍙ｅ崱銆�
銆�銆�2. 瑕栭牷铏曠悊绯荤当(t菕ng)锛屼緥濡傚湒鍍忛噰闆嗗崱鍜岃闋荤法纰艰В纰煎櫒銆�
銆�銆�3. 宸ユキ(y猫)鑷嫊鍖栨帶鍒�锛屽 PLC 鎺у埗鍣ㄥ拰閬嬪嫊鎺у埗鍣�銆�
銆�銆�4. 閱�(y墨)鐧傝ō鍌�锛屽瓒呰伈娉㈡垚鍍忓剙鍜屾偅鑰呯洠(ji膩n)璀风郴绲�(t菕ng)銆�
銆�銆�5. 姹借粖闆诲瓙绯荤当(t菕ng)锛屽淇℃伅濞涙▊绯荤当(t菕ng)鍜岄椐涜紨鍔╃郴绲�(t菕ng)銆�
銆�銆�6. 娑堣不椤為浕瀛愮敘鍝�锛屼緥濡傞珮娓呴浕瑕栧拰娓告埐姗�銆�
銆�銆�7. 娓│娓噺鍎�鍣�锛屽绀烘尝鍣ㄥ拰淇¤櫉鐧�(f膩)鐢熷櫒銆�
銆�銆�鐢变簬鍏堕潏娲绘�у拰楂樻�ц兘锛岄�欐 FPGA 鑳藉閬╂噳澶氱ó寰╅洔鐨勬噳鐢ㄥ牬鏅�銆�
EP2S30F484C5N
銆�銆�EP2S30F484I7N
