EP2SGX60CF780C3N 鏅�(sh铆)闁擄細2023/8/1 11:05:18 闁辫畝锛�230

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鐢�(ch菐n)鍝佸瀷铏�	EP2SGX60CF780C3N
鎻忚堪	IC FPGA 364 I/O 780FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
鍒堕€犲晢	鑻辩壒鐖�
绯诲垪	Stratix?II GX
鎵撳寘	鎵樼洡
闆朵欢鐙€鎱�(t脿i)	娲绘€�
闆诲-闆绘簮	1.15V?1.25V
宸ヤ綔婧害	0掳C?85掳C(TJ)
鍖呰/绠�	780-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	780-FBGA(29x29)
鍩烘湰闆朵欢铏�	EP2SGX60

鐢�(ch菐n)鍝佸湒鐗�

EP2SGX60CF780C3N

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍙法绋嬮倧杓鍨�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
绗﹀悎姝愮洘RoHS	鏄�
鐙€鎱�(t脿i)	杞�(zhu菐n)鍏�
鏈€澶ф檪(sh铆)閻橀牷鐜�	717.0鍏嗚但
CLB-Max鐨勭祫鍚堝欢閬�	4.45 ns
JESD-30浠ｇ⒓	S-PBGA-B780
JESD-609浠ｇ⒓	1铏�
绺絉AM浣�	2544192
CLB鏁�(sh霉)閲�	60440.0
杓稿叆鏁�(sh霉)閲�	364.0
閭忚集鍠厓鏁�(sh霉)	60440.0
杓稿嚭鏁�(sh霉)閲�	364.0
绔瓙鏁�(sh霉)	780
鏈€浣庡伐浣滄韩搴�	0鈩�
鏈€楂樺伐浣滄韩搴�	85鈩�
绲勭箶	60440 CLBS
宄板€煎洖娴佹韩搴�(鈩�)	245
闆绘簮	1.2,1.2 / 3.3,3.3
璩囨牸鐙€鎱�(t脿i)	涓嶅悎鏍�
搴ч珮	3.5姣背
瀛愰鍒�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
闆绘簮闆诲妯�(bi膩o)绋�	1.2浼�
鏈€灏忎緵闆婚浕澹�	1.15浼�
鏈€澶ч浕婧愰浕澹�	1.25浼�
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
婧害绛夌礆	鍏朵粬
绲傜瀹屾垚	閷�/閵€/閵�(Sn / Ag / Cu)
绲傜琛ㄦ牸	鐞�
绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅�(sh铆)闁揁宄板€煎洖娴佹韩搴︽渶澶у€�(绉�)	40
闀峰害	29.0姣背
瀵害	29.0姣背
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	BGA
鍖呰绛夋晥浠ｇ⒓	BGA780,28X28,40
鍖呰褰㈢媭	寤ｅ牬
鍖呰褰㈠紡	缍�(w菐ng)鏍奸櫍鍒�
鍒堕€犲晢鍖呰瑾槑	29 X 29 MM锛�1 MM闁撹窛锛岀劇閴�锛孧S-034AAM-1锛孎(xi脿n)BGA-780

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

鐒￠墰鐙€鎱�(t脿i)/RoHS鐙€鎱�(t脿i)	鐒￠墰/绗﹀悎RoHS
姘村垎鏁忔劅鎬ф按骞�(MSL)	3(168灏忔檪(sh铆))

鐗归粸(di菐n)

鈻犱富瑕佽ō(sh猫)鍌欏姛鑳斤細

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鏈€澶�16鍊�(g猫)鍏ㄥ眬鏅�(sh铆)閻樼恫(w菐ng)绲�(lu貌)锛屾瘡鍊�(g猫)瑷�(sh猫)鍌欏崁(q奴)鍩熸渶澶�32鍊�(g猫)鍗€(q奴)鍩熸檪(sh铆)閻樼恫(w菐ng)绲�(lu貌)
楂橀€烡SP妯″鎻愪緵涔樻硶鍣�(鏈€楂�450 MHz)锛屼箻娉曠疮鍔犲姛鑳藉拰鏈夐檺鑴堟矕闊挎噳(y墨ng)(FIR)婵炬尝鍣ㄧ殑灏堢敤瀵�(sh铆)鐝�(xi脿n)
姣忓€�(g猫)瑷�(sh猫)鍌欐渶澶氬洓鍊�(g猫)澧炲挤(qi谩ng)鐨凱LL鎻愪緵鎿�(ku貌)闋�锛屽彲绶ㄧ▼甯跺锛屾檪(sh铆)閻樺垏鎻涳紝瀵�(sh铆)鏅�(sh铆)PLL 閲嶉厤缃互鍙婇珮绱氫箻娉曞拰鐩哥Щ
鏀寔澶氱ó鍠鍜屽樊鍒咺 / O 妯�(bi膩o)婧�(zh菙n)
澶氶仈(d谩)71鍊�(g猫)閫氶亾涓婄殑楂橀€熸簮鍚屾宸垎I / O鏀寔
鏀寔婧愬悓姝ョ附绶氭(bi膩o)婧�(zh菙n)锛屽寘鎷琒PI-4 闅庢2(POS-PHY绱氬垾4)锛孲FI-4.1锛孹SBI锛孶TOPIA IV锛孨PSI 鍜孋SIX-L1
鏀寔楂橀€熷閮ㄥ瓨鍎插櫒锛屽寘鎷洓鏁�(sh霉)鎿�(j霉)閫熺巼(QDR鍜孮DRII)SRAM锛岄洐鏁�(sh霉)鎿�(j霉)閫熺巼(DDR鍜孌DR2)SDRAM鍜屽柈鏁�(sh霉)鎿�(j霉)閫熺巼(SDR)SDRAM
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鏀寔閬�(yu菐n)绋嬮厤缃洿鏂�

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鍏锋湁4銆�8銆�12銆�16鎴�20鍊�(g猫)楂橀€熶覆琛屾敹鐧�(f膩)鍣ㄩ€氶亾鐨勮ō(sh猫)鍌欙紝鍙彁渚涢珮閬�(d谩)255 Gbps鐨勪覆琛屽付瀵�(鍏ㄩ洐宸�)
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