鏅傞枔锛�2023/8/1 11:20:53
闁辫畝锛�505
鐢�(ch菐n)鍝佸瀷铏� | EP2SGX90FF1508C4N |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 650 I/O 1508FBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鍒堕�犲晢 | 鑻辩壒鐖� |
绯诲垪 | Stratix?II GX |
鎵撳寘 | 鎵樼洡 |
闆朵欢鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮 | 1.15V?1.25V |
宸ヤ綔婧害 | 0掳C?85掳C(TJ) |
鍖呰/绠� | 1508-BBGA锛孎(xi脿n)CBGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁� | 1508-FBGA(30x30) |
鍩烘湰闆朵欢铏� | EP2SGX90 |
EP2SGX90FF1508C4N
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
绗﹀悎REACH | 鏄� |
绗﹀悎姝愮洘RoHS | 鏄� |
鐙�鎱�(t脿i) | 杞�(zhu菐n)绉� |
鏈�澶ф檪閻橀牷鐜� | 717.0鍏嗚但 |
CLB-Max鐨勭祫鍚堝欢閬� | 5.117 ns |
JESD-30浠ｇ⒓ | S-PBGA-B1508 |
JESD-609浠ｇ⒓ | 1铏� |
绺絉AM浣� | 4520448 |
CLB鏁�(sh霉)閲� | 90960.0 |
杓稿叆鏁�(sh霉)閲� | 650.0 |
閭忚集鍠厓鏁�(sh霉) | 90960.0 |
杓稿嚭鏁�(sh霉)閲� | 650.0 |
绔瓙鏁�(sh霉) | 1508 |
鏈�浣庡伐浣滄韩搴� | 0鈩� |
鏈�楂樺伐浣滄韩搴� | 85鈩� |
绲勭箶 | 90960 CLBS |
宄板�煎洖娴佹韩搴�(鈩�) | 245 |
闆绘簮 | 1.2,1.2 / 3.3,3.3 |
璩囨牸鐙�鎱�(t脿i) | 涓嶅悎鏍� |
搴ч珮 | 3.5姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲妯�(bi膩o)绋� | 1.2浼� |
鏈�灏忎緵闆婚浕澹� | 1.15浼� |
鏈�澶ч浕婧愰浕澹� | 1.25浼� |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛�(sh霉) | CMOS |
婧害绛夌礆 | 鍏朵粬 |
绲傜瀹屾垚 | 閷�/閵�/閵�(Sn / Ag / Cu) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴︽渶澶у��(绉�) | 40 |
闀峰害 | 40.0姣背 |
瀵害 | 40.0姣背 |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | BGA |
鍖呰绛夋晥浠ｇ⒓ | BGA1508,39X39,40 |
鍖呰褰㈢媭 | 寤ｅ牬 |
鍖呰褰㈠紡 | 缍�(w菐ng)鏍奸櫍鍒� |
鍒堕�犲晢鍖呰瑾槑 | 40 X 40 MM锛�1 MM闁撹窛锛岀劇閴涳紝MS-034AAU-1锛孎(xi脿n)BGA-1508 |
鐒￠墰鐙�鎱�(t脿i)/RoHS鐙�鎱�(t脿i) | 鐒￠墰/绗﹀悎RoHS |
姘村垎鏁忔劅鎬ф按骞�(MSL) | 3(168灏忔檪) |
鈼忕敱涓夊�婻AM濉婂ぇ灏忕祫鎴愮殑TriMatrix瀛樺劜鍣紝鐢ㄤ簬瀵︾従(xi脿n)鐪熸鐨勯洐绔彛瀛樺劜鍣ㄥ拰鍏堥��(j矛n)鍏堝嚭(FIFO)绶╂矕鍗�(q奴)锛屽叿鏈夋�ц兘楂橀仈(d谩)550 MHz
鈼忔渶澶�16鍊嬪叏灞�鏅傞悩缍�(w菐ng)绲�(lu貌)锛屾瘡鍊嬭ō(sh猫)鍌欏崁(q奴)鍩熸渶澶�32鍊嬪崁(q奴)鍩熸檪閻樼恫(w菐ng)绲�(lu貌)
鈼忛珮閫烡SP妯″鎻愪緵涔樻硶鍣�(鏈�楂�450 MHz)锛屼箻娉曠疮鍔犲姛鑳藉拰鏈夐檺鐨勫皥鐢ㄥ鐝�(xi脿n)銆傝剤娌栭熆鎳�(y墨ng)(FIR)婵炬尝鍣�
鈼忔瘡鍊嬭ō(sh猫)鍌欐渶澶氬洓鍊嬪寮风殑PLL鎻愪緵鎿撮牷锛屽彲绶ㄧ▼甯跺锛屾檪閻樺垏鎻�锛屽鏅侾LL 閲嶉厤缃�锛屽拰楂樼礆涔樻硶鍜岀浉绉�
鈼忔敮鎸佸绋柈绔拰宸垎I / O 妯�(bi膩o)婧�(zh菙n)
鈼忓閬�(d谩)71鍊嬮�氶亾涓婄殑楂橀�熸簮鍚屾宸垎I / O鏀寔
鈼忔敮鎸佹簮鍚屾绺界窔妯�(bi膩o)婧�(zh菙n)锛屽寘鎷琒PI-4 闅庢2 (POS-PHY绱氬垾4)锛孲FI-4.1锛孹SBI锛孶TOPIA IV锛孨PSI 鍜孋SIX-L1
鈼忔敮鎸侀珮閫熷閮ㄥ瓨鍎插櫒锛屽寘鎷洓鍊嶆暩(sh霉)鎿�(j霉)閫熺巼(QDR鍜孮DRII)SRAM锛岄洐鍊嶆暩(sh霉)鎿�(j霉)閫熺巼(DDR鍜孌DR2)SDRAM锛屼互鍙婂柈鏁�(sh霉)鎿�(j霉)鐜�(SDR)SDRAM
鈼忔敮鎸佷締鑷狝ltera?MegaCore?鍔熻兘鍜孉ltera Megafunction鍚堜綔浼欎即瑷堝妰鐨勫鍊嬬煡璀樼敘(ch菐n)娆�(qu谩n)瀹忓姛鑳�锛�(AMPPSM)瀹忓姛鑳�
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鈻犳敹鐧�(f膩)鍣ㄦā濉婂姛鑳斤細
鈼忓叿鏈夋檪閻樻暩(sh霉)鎿�(j霉)鎭㈠京(f霉)(CDR)鐨勯珮閫熶覆琛屾敹鐧�(f膩)鍣ㄩ�氶亾鍙彁渚涙瘡绉�600鍏嗕綅(Mbps)鍒�6.375 Gbps 鍏ㄩ洐宸ョ殑閫熷害姣忓�嬮�氶亾鐨勬敹鐧�(f膩)鍣ㄦ搷浣�
鈼忓叿鏈�4銆�8銆�12銆�16鎴�20鍊嬮珮閫熶覆琛屾敹鐧�(f膩)鍣ㄩ�氶亾鐨勮ō(sh猫)鍌欙紝鍙彁渚涢珮閬�(d谩)255 Gbps鐨勪覆琛屽付瀵�(鍏ㄩ洐宸�)
鈼忓嫊鎱�(t脿i)鍙法绋嬬殑闆诲杓稿嚭宸垎(VOD)鍜岄爯(y霉)鍔犻噸瑷�(sh猫)缃�锛屽彲鏀瑰杽淇¤櫉瀹屾暣鎬�
鈼忔敮鎸佸熀浜嶤DR鐨勪覆琛屽崝(xi茅)璀�锛屽寘鎷琍CI Express锛屽崈鍏嗕互澶恫(w菐ng)锛孲DI锛孉ltera鐨凷erialLite II锛孹AUI锛孋EI-6G锛孋PRI锛屼覆琛孯apidIO锛孲ONET / SDH
鈼忓嫊鎱�(t脿i)閲嶆柊閰嶇疆鏀剁櫦(f膩)鍣ㄩ�氶亾锛屼互鍦ㄥ绋崝(xi茅)璀板拰鏁�(sh霉)鎿�(j霉)閫熺巼涔嬮枔鍒囨彌
鈼忕崹绔嬬殑鐧�(f膩)灏勫櫒鍜屾帴鏀跺櫒閫氶亾鎺夐浕鍔熻兘锛屼互娓涘皯闈炴搷浣滄湡闁撶殑鍔熻��
鈼忔帴鏀跺櫒鐨勮嚜閬╂噳(y墨ng)鍧囪 (AEQ)鍔熻兘锛屼互瑁滃劅涓嶆柗璁婂寲鐨勯張璺壒鎬�
鈼忓彲閬哥殑鐗囦笂绔帴闆婚樆(100銆�120鎴�150惟)锛岀敤浜庢敼鍠勫悇绋偝杓镐粙璩�(zh矛)涓婄殑淇¤櫉瀹屾暣鎬�
鈼忓彲绶ㄧ▼鐨勬敹鐧�(f膩)鍣ㄥ埌FPGA鎺ュ彛锛屾敮鎸�8浣�锛�10浣�锛�16浣�锛�20浣�锛�32浣嶅拰40浣嶅鐨勬暩(sh霉)鎿�(j霉)鍌宠几
鈼�600 鍜�6.335 Gbps鐨�1.2V鍜�1.5V鍋介浕娴佹ā寮忛倧杓�(PCML)(浜ゆ祦鑰﹀悎)
鈼忎俊铏熶笩澶辩殑鎺ユ敹鍣ㄦ寚绀虹噲(鍍呭湪PIPE 妯″紡涓嬪彲鐢�)
鈼忓収(n猫i)缃嚜娓�(BIST)
鈼忕啽鎻掓嫈锛岀劇闇�浣跨敤澶栭儴瑷�(sh猫)鍌欏嵆鍙敮鎸佺啽鎻掓嫈鎴栫啽鎻掓嫈浠ュ強闆绘簮鎺掑簭
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