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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > EP3C10F256I7N

EP3C10F256I7N 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2025/4/30 15:46:24 鏌ョ湅 闁辫畝锛�31

EP3C10F256I7N鏄疉ltera锛堢従(xi脿n)鐐篒ntel FPGA锛夋帹鍑虹殑Cyclone III绯诲垪FPGA鍣ㄤ欢銆傝┎鑺墖閲囩敤鍏堥��(j矛n)鐨�90nm宸ヨ棟鍒堕�狅紝鍏锋湁浣庡姛鑰�銆侀珮鎬ц兘鐨勭壒榛�(di菐n)銆傚畠閬╃敤浜庡绋暩(sh霉)瀛楅浕璺ō(sh猫)瑷�(j矛)鍫存櫙锛屽閫氫俊銆佸伐妤�(y猫)鎺у埗銆佹秷璨�(f猫i)闆诲瓙浠ュ強宓屽叆寮忕郴绲�(t菕ng)绛夈��
銆�銆�EP3C10F256I7N鍏�(n猫i)閮ㄥ寘鍚閬�(d谩)10,460鍊嬮倧杓柈鍏冿紙LE锛�锛屾敮鎸佸绋‖鏍稿拰杌熸牳IP闆嗘垚锛屽悓鏅傛彁渚涜睈瀵岀殑I/O璩囨簮鍜屽瓨鍎插櫒濉�銆傚叾灏佽褰㈠紡鐐篎BGA锛團ine-Pitch Ball Grid Array锛�锛屽叿鏈�256鍊嬪紩鑵�锛屽伐浣滄韩搴﹁寖鍦嶇偤宸ユキ(y猫)绱氾紙-40掳C鑷�+85掳C锛夈��

鍙冩暩(sh霉)

鍨嬭櫉锛欵P3C10F256I7N
銆�銆�绯诲垪锛欳yclone III
銆�銆�鍒堕�犲晢锛欰ltera锛堢従(xi脿n)鐐篒ntel FPGA锛�
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細10,460 LE
銆�銆�RAM瀹归噺锛�190,064 bits
銆�銆�DSP妯″鏁�(sh霉)閲忥細鐒�
銆�銆�I/O寮曡叧鏁�(sh霉)閲忥細180
銆�銆�閰嶇疆闁冨瓨锛氬閮ㄩ厤缃櫒浠�
銆�銆�灏佽椤炲瀷锛欶BGA
銆�銆�寮曡叧鏁�(sh霉)锛�256
銆�銆�鏍稿績闆诲锛�1.2V
銆�銆�I/O闆诲锛�1.5V/1.8V/2.5V/3.3V
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�宸ヨ棟绡�(ji茅)榛�(di菐n)锛�90nm

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EP3C10F256I7N鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 浣庡姛鑰楋細
銆�銆�瑭睩PGA閲囩敤浜咥ltera鐨勪綆鍔熻�楁灦妲�(g貌u)鎶�琛�(sh霉)锛屼娇鍏跺湪淇濇寔鎬ц兘鐨勫悓鏅傞’钁楅檷浣庡姛鑰�銆�
銆�銆�2. 楂樻�ц兘锛�
銆�銆�鍏峰倷蹇�熺殑淇¤櫉鍌宠几鑳藉姏锛岄仼鍚堥珮閫熸暩(sh霉)鎿�(j霉)铏曠悊鑸囨帴鍙ｈō(sh猫)瑷�(j矛)銆�
銆�銆�3. 鍏�(n猫i)閮ㄨ硣婧愯睈瀵岋細
銆�銆�鎻愪緵瓒呴亷1钀倧杓柈鍏冿紙LE锛変互鍙婂ぇ瀹归噺宓屽叆寮廟AM璩囨簮锛屾豢瓒冲京(f霉)闆滅畻娉曞(sh铆)鐝�(xi脿n)鐨勯渶姹�銆�
銆�銆�4. 闈堟椿鐨処/O鏀寔锛�
銆�銆�鏀寔澶氱óI/O妯�(bi膩o)婧�(zh菙n)锛屽寘鎷琇VCMOS銆丩VTTL銆丳CI绛夛紝骞朵笖鍏煎澶氱ó闆诲闆诲钩銆�
銆�銆�5. 蹇�熼厤缃細
銆�銆�鏀寔澶氱ó閰嶇疆妯″紡锛屼緥濡備富鍕曚覆琛岋紙AS锛�銆佽鍕曚覆琛岋紙PS锛夌瓑锛屽厑瑷辩敤鎴堕伕鎿囨渶鍚堥仼鐨勯厤缃柟寮�銆�
銆�銆�6. 寤ｆ硾鐨勬噳(y墨ng)鐢ㄩ仼鎳�(y墨ng)鎬э細
銆�銆�閬╃敤浜庨�氫俊銆佽闋昏檿鐞�銆佸伐妤�(y猫)鑷嫊鍖栫瓑澶氱ó闋�(l菒ng)鍩�銆�

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EP3C10F256I7N閬╃敤浜庝互涓嬪吀鍨嬫噳(y墨ng)鐢ㄥ牬鏅細
銆�銆�1. 宓屽叆寮忕郴绲�(t菕ng)闁嬬櫦(f膩)锛�
銆�銆�鍙敤浜庨枊鐧�(f膩)鍩轰簬FPGA鐨勫祵鍏ュ紡铏曠悊鍣�锛岀祼(ji茅)鍚堣粺鏍窩PU锛堝Nios II锛夊(sh铆)鐝�(xi脿n)闈堟椿鐨勫姛鑳芥摯(ku貌)灞曘��
銆�銆�2. 鏁�(sh霉)鎿�(j霉)閫氫俊锛�
銆�銆�鐢ㄤ簬瀵�(sh铆)鐝�(xi脿n)缍�(w菐ng)绲�(lu貌)鍗�(xi茅)璀拌檿鐞�銆佹暩(sh霉)鎿�(j霉)鍖呰綁(zhu菐n)鐧�(f膩)绛夊姛鑳�銆�
銆�銆�3. 鍦栧儚鑸囪闋昏檿鐞嗭細
銆�銆�鏀寔寰�(f霉)闆滅殑鍦栧儚铏曠悊绠楁硶锛屼緥濡傞倞绶ｆ娓�銆佹烤娉��佽壊褰╄綁(zhu菐n)鎻涚瓑銆�
銆�銆�4. 宸ユキ(y猫)鎺у埗锛�
銆�銆�瀵�(sh铆)鐝�(xi脿n)PLC鎺у埗鍣�銆侀亱(y霉n)鍕曟帶鍒朵互鍙婂叾浠栧(sh铆)鏅傛帶鍒剁郴绲�(t菕ng)銆�
銆�銆�5. 娑堣不(f猫i)椤為浕瀛愮敘(ch菐n)鍝侊細
銆�銆�鐢ㄤ簬闊抽牷瑙ｇ⒓銆侀’绀洪﹨(q奴)鍕曠瓑浠诲嫏(w霉)銆�

鏇夸唬鍨嬭櫉

EP3C16Q240C8N
銆�銆�EP3C10E256I7
銆�銆�EP3C10F256I8

ep3c10f256i7n鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児(ji脿)

ep3c10f256i7n鍙冩暩(sh霉)

  • 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″Cyclone® III FPGADesigning an IP Surveillance CameraThree Reasons to Use FPGA's in Industrial Designs
  • 妯�(bi膩o)婧�(zh菙n)鍖呰90
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛�
  • 绯诲垪Cyclone® III
  • LAB/CLB鏁�(sh霉)645
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)10320
  • RAM 浣嶇附瑷�(j矛)423936
  • 杓稿叆/杓稿嚭鏁�(sh霉)182
  • 闁�鏁�(sh霉)-
  • 闆绘簮闆诲1.15 V ~ 1.25 V
  • 瀹夎椤炲瀷琛ㄩ潰璨艰
  • 宸ヤ綔婧害-40°C ~ 100°C
  • 灏佽/澶栨256-BGA
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�256-FBGA锛�17x17锛�
  • 閰嶇敤544-2601-ND - KIT DEV CYCLONE III LS EP3CLS200544-2411-ND - KIT DEV NIOS II CYCLONE III ED.
  • 鍏跺畠鍚嶇ū544-2536