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EP3SE110F1152I4N 鏄� Altera 鍏徃锛堢従(xi脿n)宸茶 Intel 鏀惰臣锛夋帹鍑虹殑涓�娆惧熀浜� Stratix III 绯诲垪鐨� FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛夎姱鐗囥�傝┎绯诲垪 FPGA 闈㈠悜楂樻�ц兘瑷堢畻鍜屽京闆滈倧杓ō瑷�锛屽唬娉涙噳鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)鑷嫊鍖�銆侀啱(y墨)鐧傝ō鍌欍�佽粛浜嬪拰鑸┖鑸ぉ绛夐牁鍩�銆侲P3SE110F1152I4N 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆佸祵鍏ュ紡瀛樺劜鍣ㄥ銆丏SP 妯″浠ュ強楂橀�熸敹鐧�(f膩)鍣紝鑳藉婊胯冻澶氱ó寰╅洔鐨勬暩(sh霉)瀛椾俊铏熻檿鐞嗛渶姹�銆�
銆�銆�Stratix III 绯诲垪鏄� Altera 鐨勪腑楂樼 FPGA 鐢�(ch菐n)鍝佺窔涔嬩竴锛屽叾鎬ц兘鍜屽姛鑰楄〃鐝�(xi脿n)鍎�(y艒u)鐣�锛屽悓鏅傚叿鍌欏挤澶х殑闈堟椿鎬у拰鎿村睍鎬э紝鍙互鏀寔寰炰綆鍔熻�楀埌楂樻�ц兘鐨勫妯ｅ寲鎳夌敤銆�
鍨嬭櫉锛欵P3SE110F1152I4N
銆�銆�鍝佺墝锛欰ltera/Intel
銆�銆�绯诲垪锛歋tratix III
銆�銆�閭忚集鍠厓鏁�(sh霉)锛�110,160
銆�銆�鏈�澶х敤鎴� I/O 寮曡叧鏁�(sh霉)锛�580
銆�銆�閰嶇疆闁冨瓨瀹归噺锛氱劇鍏�(n猫i)缃厤缃杻瀛�
銆�銆�宓屽叆寮� RAM 绺介噺锛�6.7 Mb
銆�銆�DSP 妯″鏁�(sh霉)閲忥細360
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�灏佽椤炲瀷锛欶BGA
銆�銆�灏佽寮曡叧鏁�(sh霉)锛�1152
EP3SE110F1152I4N 鏄竴娆惧姛鑳藉挤澶х殑 FPGA 鑺墖锛屽叿鏈変互涓嬩富瑕佺壒鎬э細
銆�銆�1. 閭忚集瀵嗗害楂橈細鎿佹湁瓒呴亷 11 钀�嬮倧杓柈鍏冿紝閬╁悎瀵︾従(xi脿n)寰╅洔鐨勬暩(sh霉)瀛楅浕璺ō瑷�銆�
銆�銆�2. 鍏�(n猫i)缃瓨鍎插櫒锛氭彁渚涗簡楂橀仈 6.7Mb 鐨勫祵鍏ュ紡 RAM锛岃兘澶犳豢瓒虫暩(sh霉)鎿�(j霉)绶╂矕鍜岄珮閫熺珐瀛樼殑闇�姹�銆�
銆�銆�3. DSP 鍔熻兘寮峰ぇ锛氶泦鎴愪簡 360 鍊嬪皥鐢� DSP 妯″锛岄潪甯搁仼鍚堟暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕欙紝濡傛烤娉㈠櫒瑷▓銆丗FT 鍜岀煩闄ｉ亱绠楃瓑銆�
銆�銆�4. 楂橀�熸帴鍙ｆ敮鎸侊細鏀寔澶氭 PCIe Gen2 閫氶亾銆丟igabit Transceivers锛堟渶楂樺彲閬� 6.5Gbps锛夛紝閬╃敤浜庨珮閫熸暩(sh霉)鎿�(j霉)鍌宠几鍫存櫙銆�
銆�銆�5. 浣庡姛鑰楀劒(y艒u)鍖栵細閫氶亷鍕曟厠(t脿i)鍔熻�楃鐞嗘妧琛撻檷浣庢暣楂旂郴绲�(t菕ng)鑳借��銆�
銆�銆�6. 闈堟椿鐨勬檪閻樼鐞嗭細鎻愪緵 PLL 鍜� DCM 绛夋檪閻樼鐞嗚硣婧愶紝鏀寔绮剧⒑鐨勬檪閻樺垎閰嶅拰鍚屾鎺у埗銆�
銆�銆�7. 寤ｆ硾鐨勬噳鐢ㄩ牁鍩燂細鍙敤浜庨�氫俊鍩虹瑷柦銆佽闋诲湒鍍忚檿鐞�銆佹暩(sh霉)鎿�(j霉)鍔犲瘑瑙ｅ瘑銆佹脯瑭︽脯閲忚ō鍌欑瓑澶氬�嬮牁鍩�銆�
EP3SE110F1152I4N 涓昏鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊瑷倷锛氬寘鎷熀绔�銆佽矾鐢卞櫒銆佷氦鎻涙绛夛紝鐢ㄤ簬瀵︾従(xi脿n)鍗�(xi茅)璀拌檿鐞�銆佹暩(sh霉)鎿�(j霉)鍖呰綁(zhu菐n)鐧�(f膩)绛夊姛鑳�銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栵細鍦ㄥ鏅傛帶鍒剁郴绲�(t菕ng)銆侀亱鍕曟帶鍒跺櫒鍜屽伐妤�(y猫)姗熷櫒浜轰腑浣跨敤锛岃矤璨京闆滅殑閭忚集閬嬬畻鍜屼俊铏熻檿鐞�銆�
銆�銆�3. 閱�(y墨)鐧傝ō鍌欙細渚嬪瓒呰伈鎴愬儚鍎�銆丆T 鎺冩弿鍎�绛�锛岀敤浜庡湒鍍忛噸寤虹畻娉曞姞閫熴��
銆�銆�4. 杌嶄簨鑸囪埅澶╋細闆烽仈绯荤当(t菕ng)銆佸皫鑸ō鍌�銆佽(w猫i)鏄熼�氫俊绛夐牁鍩�锛岄渶瑕侀珮鍙潬鎬у拰楂樻�ц兘鐨勮В姹烘柟妗�銆�
銆�銆�5. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浜庢湇鍕欏櫒涓殑鏁�(sh霉)鎿�(j霉)澹撶府銆佸姞瑙ｅ瘑绛変换鍕�锛屾彁楂樺悶鍚愰噺鍜屾晥鐜囥��
EP3SE110F780C2N
銆�銆�EP3SE110F780I3N
