鏅傞枔锛�2025/5/10 10:54:34
闁辫畝锛�21
EP4SGX360HF35I3G 鏄敱 Altera锛堢従(xi脿n)鐐� Intel FPGA锛夌敓鐢㈢殑 Stratix GX 绯诲垪 FPGA 鑺墖銆傝┎鑺墖閲囩敤鍏堥�茬殑 CMOS 宸ヨ棟鍒堕�狅紝鏀寔楂樻�ц兘閭忚集瑷▓鍜屼俊铏熻檿鐞嗘噳鐢�銆傚畠鍏峰倷璞愬瘜鐨勬暩(sh霉)瀛椾俊铏熻檿鐞嗗櫒 (DSP) 妯″銆佸祵鍏ュ紡瀛樺劜鍣ㄤ互鍙婇珮閫熸敹鐧�(f膩)鍣紝閬╃敤浜庨�氫俊鍩虹瑷柦銆佽粛浜嬭垏鑸┖鑸ぉ銆佸唬鎾闋昏檿鐞嗕互鍙婂叾浠栭珮甯跺鏁�(sh霉)鎿氬偝杓稿牬鏅��
銆�銆�Stratix GX 绯诲垪 FPGA 閲濆皪闇�瑕侀珮瀵嗗害閭忚集鍜岄珮閫熶覆琛岄�ｆ帴鐨勬噳鐢ㄩ�茶浜嗗劒(y艒u)鍖�锛屾彁渚涢潏娲荤殑鏋舵浠ユ豢瓒冲绋京闆滅殑瑷▓闇�姹傘��
鍨嬭櫉锛欵P4SGX360HF35I3G
銆�銆�鍝佺墝锛欰ltera (Intel FPGA)
銆�銆�绯诲垪锛歋tratix GX
銆�銆�灏佽锛欶BGA
銆�銆�I/O 鏁�(sh霉)閲忥細820
銆�銆�閰嶇疆闁冨瓨锛氬閮ㄩ厤缃�
銆�銆�鍏ф牳闆诲锛�1.2V
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細360,144
銆�銆�鏈�澶х敤鎴� I/O 寮曡叧鏁�(sh霉)锛�764
銆�銆�宓屽叆寮忓瓨鍎插櫒瀹归噺锛�9.1Mb
銆�銆�DSP 妯″鏁�(sh霉)閲忥細240
銆�銆�鏀剁櫦(f膩)鍣ㄩ�氶亾鏁�(sh霉)閲忥細24
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼锛氭渶楂� 6.375Gbps
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
EP4SGX360HF35I3G 鎻愪緵寮峰ぇ鐨勫姛鑳界壒鎬�锛屼娇鍏舵垚鐐洪珮绔� FPGA 鎳夌敤鐨勭悊鎯抽伕鎿�銆備互涓嬫槸鍏朵富瑕佺壒榛烇細
銆�銆�1. 楂樻�ц兘閭忚集鏋舵锛氭敮鎸佸ぇ瑕�(gu墨)妯℃暩(sh霉)瀛楅浕璺ō瑷�锛屽寘鍚閬� 360K 鍊嬮倧杓柈鍏冦��
銆�銆�2. 宓屽叆寮� DSP 妯″锛氶泦鎴� 240 鍊嬪皥鐢� DSP 妯″锛岃兘澶犻’钁楀姞閫熸诞榛為亱绠楀拰寰╅洔鏁�(sh霉)瀛歌▓绠�銆�
銆�銆�3. 楂橀�熸敹鐧�(f膩)鍣細鏀寔楂橀仈 6.375Gbps 鐨勬暩(sh霉)鎿氬偝杓搁�熺巼锛屾豢瓒充笅涓�浠ｉ�氫俊妯欐簴鐨勮姹�銆�
銆�銆�4. 澶у閲忓祵鍏ュ紡瀛樺劜鍣細鎻愪緵 9.1Mb 鍏ч儴 RAM锛岀敤浜庣珐瀛樺拰鑷ㄦ檪鏁�(sh霉)鎿氬瓨鍎层��
銆�銆�5. 闈堟椿鐨勬檪閻樼鐞嗭細鍏х疆 PLL 鍜� DCM 妯″锛屾敮鎸佺簿纰虹殑鏅傞悩鍒嗛厤鍜岀浉浣嶈鏁淬��
銆�銆�6. 鍙摯灞曟�э細閫氶亷 Avalon 绺界窔瀵︾従(xi脿n)鑸囧叾浠� IP 鏍哥殑鐒＄斧闆嗘垚锛屾彁鍗囩郴绲�(t菕ng)闈堟椿鎬�銆�
銆�銆�7. 鏀寔澶氱ó鎺ュ彛鍗�(xi茅)璀帮細鍖呮嫭 PCIe銆佸崈鍏嗕互澶恫銆丏DR3 绛夛紝鏂逛究妲嬪缓寰╅洔鐨勫妯″绯荤当(t菕ng)銆�
EP4SGX360HF35I3G 涓昏鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊瑷倷锛氬鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙涓殑淇¤櫉铏曠悊鍜屾暩(sh霉)鎿氳綁鐧�(f膩)銆�
銆�銆�2. 杌嶄簨鑸囪埅绌鸿埅澶╋細闆烽仈绯荤当(t菕ng)銆佽(w猫i)鏄熼�氫俊鍜屽湒鍍忚檿鐞嗙瓑闋樺煙銆�
銆�銆�3. 寤ｆ挱瑕栭牷铏曠悊锛氬鏅傝闋荤法纰�銆佽В纰煎強鍦栧舰娓叉煋銆�
銆�銆�4. 鏁�(sh霉)鎿氫腑蹇冿細缍茬怠鍔犻�熷崱銆佸瓨鍎叉帶鍒跺櫒鍜岄珮鎬ц兘瑷堢畻骞宠嚭銆�
銆�銆�5. 宸ユキ(y猫)鑷嫊鍖栵細閬嬪嫊鎺у埗銆佽瑕烘娓拰鍏朵粬楂樼簿搴︿换鍕欒檿鐞嗐��
銆�銆�6. 閱�(y墨)鐧傛垚鍍忥細瓒呰伈娉㈣ō鍌�銆丆T 鎺冩弿鍎�绛夐珮鎬ц兘鍦栧儚鐢熸垚鑸囧垎鏋愮郴绲�(t菕ng)銆�
EP4SGX360KF35C2, EP4SGX360HF35C2
