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铏曠悊鍣細Tensilica LX6 Dual Core
銆€銆€涓婚牷锛氭渶楂�240MHz
銆€銆€闁冨瓨锛�16MB
銆€銆€RAM锛�520KB SRAM + 8MB PSRAM
銆€銆€鐒＄窔鍗�(xi茅)璀帮細802.11b/g/n Wi-Fi, Bluetooth 4.2 BR/EDR and BLE
銆€銆€GPIO鏁�(sh霉)閲忥細34鍊媀-3.6V
銆€銆€灏佽褰㈠紡锛歈FN
銆€銆€灏哄锛�24mm x 17mm x 1.9mm

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