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鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > GD25LQ256DYIGY

GD25LQ256DYIGY 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2024/5/7 15:50:37 鏌ョ湅 闁辫畝锛�302

GD25LQ256DYIGY (256M-bit)涓茶闁冨瓨鏀寔妯�(bi膩o)婧�(zh菙n)SPI (Serial Peripheral Interface)锛屾敮鎸丏ual/Quad SPI鍜孮PI妯″紡:Serial Clock, Chip Select, Serial Data I/O0 (SI)锛� I/O1 (SO)锛� I/O2 (WP#)锛� I/O3 (HOLD#)銆傞洐I/O鏁�(sh霉)鎿�(j霉)鍌宠几閫熷害鐐�240Mbits/s锛屽洓I/O鍜屽洓杓稿嚭鏁�(sh霉)鎿�(j霉)鍌宠几閫熷害鐐�480Mbits/s銆�

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銆�銆�寤犲晢鍨嬭櫉(h脿o)锛欸D25LQ256DYIGY

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銆�銆�鍨嬭櫉(h脿o)浠嬬垂锛�256Mbit

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涓枃鍙冩暩(sh霉)

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灏佽WSON-8_8x6mm鍖呰鎵樼洡(p谩n)

鍘熺悊鍦�

GD25LQ256DYIGY鍘熺悊鍦�

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