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HC32F005C6UA-SFN20TR鏄� Low Pin Count銆佸闆诲宸ヤ綔鑼冨湇鐨� MCU銆傞泦鎴� 12 浣� 1Msps 楂樼簿搴� SARADC 浠ュ強闆嗘垚浜嗘瘮杓冨櫒銆佸璺� UART銆丼PI銆両2C 绛夎睈瀵岀殑閫氳▕澶栬ō锛屽叿鏈夐珮鏁村悎搴︺�侀珮鎶楀共鎿�銆侀珮鍙潬鎬х殑鐗归粸銆傛湰鐢㈠搧鍏ф牳閲囩敤 Cortex-M0+ 鍏ф牳锛岄厤鍚堟垚鐔熺殑 Keil & IAR 瑾胯│闁嬬櫦(f膩)杌熶欢锛屾敮鎸� C 瑾炶█鍙婂尟绶ㄨ獮瑷�锛屽尟绶ㄦ寚浠�銆�
銆�銆�鈼�32MHz Cortex-M0+ 32 浣�CPU骞宠嚭
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銆�銆�鈥� 5渭A @ 3V 娣卞害浼戠湢妯″紡锛氭墍鏈夋檪閻橀棞闁�锛屼笂闆诲京浣嶆湁鏁�锛�IO 鐙�鎱�(t脿i)淇濇寔锛�IO 涓柗鏈夋晥锛屾墍鏈夊瘎瀛樺櫒銆�RAM 鍜�CPU鏁�(sh霉)鎿�(j霉)淇濆瓨鐙�鎱�(t脿i)鏅傜殑鍔熻��
銆�銆�鈥� 10渭A @32KHz 浣庨�熷伐浣滄ā寮忥細CPU 鍜屽瑷ā濉婇亱琛屼腑锛屽緸Flash 閬嬭绋嬪簭
銆�銆�鈥� 30渭A/MHz@3V@16MHz 浼戠湢妯″紡锛�CPU 鍋滄宸ヤ綔锛屽瑷ā濉婇亱琛�锛屼富鏅傞悩閬嬭
銆�銆�鈥� 150渭A/MHz@3V@16MHz 宸ヤ綔妯″紡锛�CPU 鍜屽瑷ā濉婇亱琛�锛屽緸Flash 閬嬭绋嬪簭
銆�銆�鈥� 4渭s 浣庡姛鑰楀枤閱掓檪闁�锛屼娇妯″紡鍒囨彌鏇村姞闈堟椿楂樻晥锛岀郴绲�(t菕ng)鍙嶆噳鏇寸偤鏁忔嵎
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銆�銆�鈼�Flash 瀛樺劜鍣�锛屽叿鏈夋摝瀵繚璀峰姛鑳�
銆�銆�鈥� HC32F003绯诲垪鏀寔16K瀛楃瘈(ji茅)Flash
銆�銆�鈥� HC32F005绯诲垪鏀寔32K瀛楃瘈(ji茅)Flash
銆�銆�鈼�RAM 瀛樺劜鍣�锛岄檮甯跺鍋舵牎椹�锛屽寮风郴绲�(t菕ng)鐨勭┅(w臎n)瀹氭��
銆�銆�鈥� HC32F003绯诲垪鏀寔2K瀛楃瘈(ji茅)RAM
銆�銆�鈥� HC32F005绯诲垪鏀寔4K瀛楃瘈(ji茅)RAM
銆�銆�灏忓闆�锛屽厖闆诲櫒锛岄噸鍚堥枠锛岄仚鎺у櫒锛岄浕瀛愮厵锛岀噧姘ｅ牨璀﹀櫒锛屾暩(sh霉)椤〃锛屾韩鎺у櫒锛岃閷勫剙绛夎妤�(y猫)
銆�銆�鏅鸿兘浜ら�氾紝鏅烘収鍩庡競锛屾櫤鑳藉灞�
銆�銆�鐏鎺㈤牠锛屾櫤鑳介杸閹栵紝鐒＄窔鐩�(ji膩n)鎺х瓑鏅鸿兘鍌虫劅鍣ㄦ噳鐢�
銆�銆�闆绘椹呭嫊
| 鍒嗛 | MCU | ADC(鍠厓鏁�(sh霉)/閫氶亾鏁�(sh霉)/浣嶆暩(sh霉)) | 1@x9ch/12bit |
| CPU鍏ф牳 | ARM Cortex-M0 | 16浣峊imer鏁�(sh霉)閲� | 6 |
| CPU鏈�澶т富闋� | 32MHz | 鍏ч儴姣旇純鍣ㄦ暩(sh霉)閲� | 2 |
| 宸ヤ綔闆诲鑼冨湇 | 1.8V~5.5V | U(S)ART璺暩(sh霉) | 2 |
| 鍏ч儴鎸暕鍣� | 鏈� | I2C璺暩(sh霉) | 1 |
| 澶栭儴鏅傞悩闋荤巼鑼冨湇 | 4MHz~32MHz | (Q)SPI璺暩(sh霉) | 1 |
| 绋嬪簭 FLASH瀹归噺 | 32KB | 澶栬ō/鍔熻兘/鍗�(xi茅)璀版＇ | 鐗囪級婧害鍌虫劅鍣�锛涗綆闆诲妾㈡脯锛汣RC鏍￠锛汸WM |
| RAM绺藉閲� | 4KB | 宸ヤ綔婧害鑼冨湇 | -40鈩儈+85鈩� |
| GPIO绔彛鏁�(sh霉)閲� | 16 |
HC32F005C6UA-SFN20TR鍘熺悊鍦�
HC32F005C6UA-SFN20TR寮曡叧鍦�
HC32F005C6UA-SFN20TR灏佽
HC32F005C6UA-SFN20TR鏂欒櫉瑙ｉ噵
