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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > HC32L130F8UA-QFN32

HC32L130F8UA-QFN32 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2024/4/29 16:51:42 鏌ョ湅 闁辫畝锛�281

HC32L130F8UA-QFN32绯诲垪鏄竴娆炬棬鍦ㄥ欢闀�(zh菐ng)渚挎敎寮忔脯(c猫)閲忕郴绲�(t菕ng)鐨勯浕姹犱娇鐢ㄥ＝鍛界殑瓒呬綆鍔熻��銆佸闆诲宸ヤ綔鑼冨湇鐨� MCU銆傞泦鎴� 12 浣� 1Msps 楂樼簿搴� SARADC 浠ュ強闆嗘垚浜嗘瘮杓冨櫒銆侀亱(y霉n)鏀俱�佸収(n猫i)缃珮鎬ц兘 PWM 瀹氭檪(sh铆)鍣�銆丩CD 椤ず銆佸璺� UART銆丼PI銆両2C 绛夎睈瀵岀殑閫氳▕澶栬ō(sh猫)锛屽収(n猫i)寤� AES銆乀RNG 绛変俊鎭畨鍏ㄦā濉婏紝鍏锋湁楂樻暣鍚堝害銆侀珮鎶楀共鎿�銆侀珮鍙潬鎬у拰瓒呬綆鍔熻�楃殑鐗归粸(di菐n)銆傛湰鐢�(ch菐n)鍝佸収(n猫i)鏍搁噰鐢� Cortex-M0+ 鍏�(n猫i)鏍�锛岄厤鍚堟垚鐔熺殑Keil & IAR 瑾�(di脿o)瑭﹂枊(k膩i)鐧�(f膩)杌熶欢锛屾敮鎸� C 瑾�(y菙)瑷�鍙婂尟绶ㄨ獮(y菙)瑷�锛屽尟绶ㄦ寚浠�銆�

鍩虹(ch菙)浠嬬垂

銆�銆�寤�(ch菐ng)鍟嗗瀷铏�(h脿o)锛欻C32L130F8UA-QFN32

銆�銆�鍝佺墝鍚嶇ū(ch膿ng)锛欻DSC(鑿ぇ)

銆�銆�鍏冧欢椤�(l猫i)鍒ワ細MCU鑺墖

銆�銆�灏佽瑕�(gu墨)鏍硷細QFN-32

銆�銆�鍨嬭櫉(h脿o)浠嬬垂锛氭湁闈堟椿鐨勫姛鑰楃鐞嗙郴绲�(t菕ng)锛岃秴浣庡姛鑰楁�ц兘

鐗归粸(di菐n)

銆�銆�鈼�48MHz Cortex-M0+ 32 浣� CPU 骞宠嚭(t谩i)

銆�銆�鈼�HC32L130/HC32L136 绯诲垪鍏锋湁闈堟椿鐨勫姛鑰楃鐞嗙郴绲�(t菕ng)锛岃秴浣庡姛鑰楁�ц兘

銆�銆�鈥� 0.5渭A @ 3V 娣卞害浼戠湢妯″紡锛氭墍鏈夋檪(sh铆)閻橀棞(gu膩n)闁夛紝涓婇浕寰�(f霉)浣嶆湁鏁�锛�IO 鐙�鎱�(t脿i)淇濇寔锛�IO 涓柗鏈夋晥锛屾墍鏈夊瘎瀛樺櫒銆�RAM 鍜� CPU 鏁�(sh霉)鎿�(j霉)淇濆瓨鐙�鎱�(t脿i)鏅�(sh铆)鐨勫姛鑰�

銆�銆�鈥� 0.9渭A @3V 娣卞害浼戠湢妯″紡+ RTC 宸ヤ綔

銆�銆�鈥� 7渭[email protected] 浣庨�熷伐浣滄ā寮忥細CPU 鍜屽瑷�(sh猫)閬�(y霉n)琛岋紝寰� Flash 閬�(y霉n)琛岀▼搴�

銆�銆�鈥� 35渭A/MHz@3V@24MHz 浼戠湢妯″紡锛�CPU 鍋滄锛屽瑷�(sh猫)閬�(y霉n)琛�锛屼富鏅�(sh铆)閻橀亱(y霉n)琛�

銆�銆�鈥� 130渭A/MHz@3V@24MHz 宸ヤ綔妯″紡锛�CPU鍜屽瑷�(sh猫)閬�(y霉n)琛�锛屽緸 Flash 閬�(y霉n)琛岀▼搴�

銆�銆�鈥� 4渭s 瓒呬綆鍔熻�楀枤閱掓檪(sh铆)闁�锛屼娇妯″紡鍒囨彌鏇村姞闈堟椿楂樻晥锛岀郴绲�(t菕ng)鍙嶆噳(y墨ng)鏇寸偤鏁忔嵎

銆�銆�鈼�64K 瀛楃瘈(ji茅) Flash 瀛樺劜(ch菙)鍣�锛屽叿鏈夋摝瀵�(xi臎)淇濊(h霉)鍔熻兘

銆�銆�鈼�8K 瀛楃瘈(ji茅) RAM 瀛樺劜(ch菙)鍣�锛岄檮甯跺鍋舵牎椹�(y脿n)锛屽寮�(qi谩ng)绯荤当(t菕ng)鐨勭┅(w臎n)瀹氭��

銆�銆�鈼�閫氱敤 I/O 寮曡叧 (56IO/64pin, 40IO/48pin,26IO/32pin, 23IO/28pin)

銆�銆�鈼�鏅�(sh铆)閻�銆佹櫠鎸�

銆�銆�鈥� 澶栭儴楂橀�熸櫠鎸� 4 ~ 32MHz

銆�銆�鈥� 澶栭儴浣庨�熸櫠鎸� 32.768kHz

銆�銆�鈥� 鍏�(n猫i)閮ㄩ珮閫熸檪(sh铆)閻� 4/8/16/22.12/24MHz

銆�銆�鈥� 鍏�(n猫i)閮ㄤ綆閫熸檪(sh铆)閻� 32.8/38.4kHz

銆�銆�鈥� PLL 鏅�(sh铆)閻� 8 ~ 48MHz

銆�銆�鈥� 纭欢鏀寔鍏�(n猫i)澶栨檪(sh铆)閻樻牎婧�(zh菙n)鍜岀洠(ji膩n)鎺�

鎳�(y墨ng)鐢ㄩ牁(l菒ng)鍩�

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銆�銆�鏅鸿兘浜ら��锛屾櫤鎱у煄甯�锛屾櫤鑳藉灞�

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銆�銆�鍚勭ó灏�(du矛)浜庨浕姹犱緵闆诲拰灏�(du矛)浜庡姛鑰楄嫑姹傜殑渚挎敎寮忚ō(sh猫)鍌�

涓枃鍙冩暩(sh霉)

鍒嗛(l猫i)MCUADC(鍠厓鏁�(sh霉)/閫氶亾鏁�(sh霉)/浣嶆暩(sh霉))1@x8ch/12bit
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CPU鏈�澶т富闋�48MHz鍏�(n猫i)閮ㄦ瘮杓冨櫒鏁�(sh霉)閲�2
宸ヤ綔闆诲鑼冨湇1.8V~5.5VU(S)ART璺暩(sh霉)3
鍏�(n猫i)閮ㄦ尟钑╁櫒鏈�I2C璺暩(sh霉)2
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绋嬪簭 FLASH瀹归噺64KB澶栬ō(sh猫)/鍔熻兘/鍗�(xi茅)璀版＇鐗囪級婧害鍌虫劅鍣�锛汥MA锛涚湅闁�(m茅n)鐙�锛涗綆闆诲妾㈡脯(c猫)锛涚‖浠跺瘑纰肩畻娉曞紩鎿�锛汣RC鏍￠(y脿n)锛汸WM锛涚湡闅ㄦ(j墨)鏁�(sh霉)鐧�(f膩)鐢熷櫒锛汻TC瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻�
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GPIO绔彛鏁�(sh霉)閲�26


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HC32L130F8UA-QFN32灏佽

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