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IDT7025L35GB 鏄敱 IDT锛圛ntegrated Device Technology锛夊叕鍙哥敓鐢�(ch菐n)鐨勪竴娆鹃珮鎬ц兘銆佷綆鎶栧嫊鏅傞悩绶╂矕鍣ㄨ姱鐗囷紝寤ｆ硾鎳夌敤浜庨�氫俊瑷倷銆佺恫(w菐ng)绲′氦鎻涙銆佹湇鍕欏櫒鍜屽瓨鍎茬郴绲�(t菕ng)绛夐牁鍩�銆傝┎鑺墖鍏锋湁鍑鸿壊鐨勬姈鍕曟�ц兘鍜岄珮闋荤巼鏀寔鑳藉姏锛岃兘澶犵偤绯荤当(t菕ng)鎻愪緵绌�(w臎n)瀹氬彲闈犵殑鏅傞悩淇¤櫉銆傚叾瑷▓鏃ㄥ湪婊胯冻灏嶆檪閻樹俊铏熻唱(zh矛)閲忚姹傝純楂樼殑鎳夌敤鍫存櫙銆�
鍨嬭櫉锛欼DT7025L35GB
銆�銆�鍝佺墝锛欼DT
銆�銆�绯诲垪锛歏ersaClock 3L
銆�銆�鍔熻兘锛氭檪閻樼珐娌栧櫒
銆�銆�杓稿叆椤炲瀷锛歀VPECL/LVDS/HSTL
銆�銆�杓稿嚭椤炲瀷锛歀VCMOS
銆�銆�闆绘簮闆诲锛�1.8V - 3.3V
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�灏佽锛歍QFP-48
銆�銆�闋荤巼鑼冨湇锛氭渶楂樻敮鎸� 350MHz
銆�銆�鎶栧嫊锛氬吀鍨嬪�肩偤 150fs RMS
IDT7025L35GB 鑺墖鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘鏅傞悩鍒嗛厤鍔熻兘锛屾敮鎸侀珮閬� 350MHz 鐨勯牷鐜囪寖鍦�銆�
銆�銆�2. 杓稿叆鍏煎澶氱ó妯欐簴锛屽 LVPECL銆丩VDS 鍜� HSTL锛屼究浜庤垏鍚勭ó椤炲瀷鐨勬檪閻樻簮閫ｆ帴銆�
銆�銆�3. 杓稿嚭鏀寔 LVCMOS 妯欐簴锛岄仼鐢ㄤ簬寤ｆ硾鐨勪笅娓稿櫒浠躲��
銆�銆�4. 浣庣浉浣嶆姈鍕�锛屽吀鍨嬪�肩偤 150fs RMS锛岀⒑淇濅簡楂樼簿搴︾殑鏅傞悩淇¤櫉鍌宠几銆�
銆�銆�5. 鏀寔 1.8V 鑷� 3.3V 鐨勫闆绘簮闆诲鑼冨湇锛岄仼鎳変笉鍚岀郴绲�(t菕ng)鐨勯浕婧愰渶姹�銆�
銆�銆�6. 宸ユキ(y猫)绱氭韩搴﹁寖鍦�锛岃兘澶犲湪 -40掳C 鑷� +85掳C 鐨勭挵(hu谩n)澧冧笅绌�(w臎n)瀹氬伐浣�銆�
銆�銆�7. 灏佽閲囩敤 TQFP-48锛屾槗浜庨泦鎴愬埌 PCB 瑷▓涓�銆�
銆�銆�8. 鍏�(n猫i)缃绋姛鑳芥ā寮�锛屽厑瑷遍潏娲婚厤缃互婊胯冻涓嶅悓鎳夌敤闇�姹�銆�
IDT7025L35GB 鑺墖閬╃敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 鏁�(sh霉)鎿�(j霉)閫氫俊鍜岄浕淇¤ō鍌欎腑鐨勬檪閻樹俊铏熷垎閰�銆�
銆�銆�2. 缍�(w菐ng)绲′氦鎻涙鍜岃矾鐢卞櫒鐨勬檪閻樺悓姝ユā濉�銆�
銆�銆�3. 鏈嶅嫏鍣ㄥ拰瀛樺劜绯荤当(t菕ng)鐨勯珮鎬ц兘鏅傞悩瑙ｆ焙鏂规銆�
銆�銆�4. 閱�(y墨)鐧傞浕瀛愯ō鍌欎腑鐨勭簿纰烘檪閻樻帶鍒�銆�
銆�銆�5. 娓│鑸囨脯閲忓剙鍣ㄤ腑鐨勪綆鎶栧嫊鏅傞悩鐢熸垚銆�
銆�銆�6. 娑堣不椤為浕瀛愮敘(ch菐n)鍝佷腑鐨勬檪閻樺垎鐧�(f膩)鎳夌敤銆�
銆�銆�瑭茶姱鐗囨啈鍊熷叾鍑鸿壊鐨勬�ц兘鍜屽彲闈犳��锛屾垚鐐虹溇澶氶珮绮惧害鏅傞悩鎳夌敤鐨勭悊鎯抽伕鎿�銆�
IDT7025L35GA, IDT7025L35GC
