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LFXP2-8E-5FTN256I 鏄竴娆鹃珮鎬ц兘銆佷綆鍔熻€楃殑 FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛夎姱鐗�锛屽熀浜庡厛閫�(j矛n)鐨勫伐钘濇妧琛�(sh霉)鍒堕€犮€傝┎鑺墖閬╃敤浜庡悇绋京(f霉)闆滅殑鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊浠诲嫏(w霉)鍜屽祵鍏ュ紡绯荤当(t菕ng)瑷�(sh猫)瑷�(j矛)銆傚叾闈堟椿鐨勬灦妲�(g貌u)鏀寔鐢ㄦ埗閫氶亷纭欢鎻忚堪瑾炶█锛圚DL锛夊皪(du矛)鍏�(n猫i)閮ㄩ倧杓€�(j矛n)琛屽畾鍒跺寲閰嶇疆锛屽緸鑰屾豢瓒崇壒瀹氱殑鎳�(y墨ng)鐢ㄩ渶姹�銆�
銆€銆€瑭插瀷铏�(h脿o)灞簬 LFXP 绯诲垪锛屽叿鏈夐珮闆嗘垚搴﹀拰鍎�(y艒u)鐣扮殑鎬ц兘鍔熻€楁瘮锛屽唬娉涙噳(y墨ng)鐢ㄤ簬宸ユキ(y猫)鎺у埗銆侀€氫俊瑷�(sh猫)鍌欍€佹秷璨�(f猫i)椤為浕瀛愪互鍙婃苯杌婇浕瀛愮瓑闋�(l菒ng)鍩�銆�

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閭忚集鍠厓鏁�(sh霉)閲忥細25K
銆€銆€閰嶇疆瀛樺劜(ch菙)鍣ㄩ鍨嬶細Flash
銆€銆€宸ヤ綔闆诲锛�1.2V
銆€銆€I/O 宸ヤ綔闆诲鑼冨湇锛�1.2V 鑷� 3.3V
銆€銆€鏈€澶х敤鎴� I/O 鏁�(sh霉)閲忥細174
銆€銆€鍏�(n猫i)鏍搁牷鐜囪寖鍦嶏細0 鑷� 300MHz
銆€銆€闈滄厠(t脿i)鍔熻€楋細灏忎簬 5mW
銆€銆€灏佽椤炲瀷锛欶TN256
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆€銆€鏀寔鐨勬帴鍙ｆ(bi膩o)婧�(zh菙n)锛歀VCMOS, LVDS, SATA

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LFXP2-8E-5FTN256I 鑺墖鍏峰倷浠ヤ笅涓昏鐗规€э細
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閫欐 FPGA 鑺墖閬╁悎鐢ㄥ湪浠ヤ笅闋�(l菒ng)鍩燂細
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