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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > MK20DX128VLK7

MK20DX128VLK7 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2024/4/29 16:42:07 鏌ョ湅 闁辫畝锛�140

MK20DX128VLK7鏄疜inetis? K20绯诲垪涓�鍝�锛�72 MHz MCU绯诲垪鐐轰腑绛夋�ц兘鐨凨inetis鐢�(ch菐n)鍝佺祫鍚堟彁渚涗簡鍙摯(ku貌)灞曠殑鍏ラ杸绱�(j铆)鐢�(ch菐n)鍝侊紝鍏锋湁宸暟鍖栫殑闆嗘垚锛岄厤鍌欓珮绮惧害妯℃摤闆嗘垚鍜岄潏娲荤殑浣庡姛鑰楀姛鑳�銆傚寘鎷睈瀵岀殑妯℃摤銆侀�氫俊銆佸畾鏅�(sh铆)鍜屾帶鍒跺瑷�(sh猫)濂椾欢锛屾豢瓒冲唬娉涚殑闇�姹�銆傚苟浠ユ渶灏忛暦(zh菐ng)搴︾殑浜掗�ｆ渶澶ч檺搴﹀湴鎻愰珮鏉垮崱绌洪枔锛屽苟澧炲挤(qi谩ng)鎬ц兘?锛焥灏忕従(xi脿n)鏈夋噳(y墨ng)鐢ㄧ殑澶у皬锛屽�熷姪鏅鸿兘鐗囦笂闆嗘垚锛岄’钁楃瘈(ji茅)鐪丅OM鎴愭湰銆�

鍩虹(ch菙)浠嬬垂

銆�銆�寤犲晢鍨嬭櫉(h脿o)锛歁K20DX128VLK7

銆�銆�鍝佺墝鍚嶇ū锛歍I(寰峰窞鍎�鍣�)

銆�銆�鍏冧欢椤炲垾锛歁CU

銆�銆�灏佽瑕�(gu墨)鏍硷細LQFP-80

銆�銆�鍨嬭櫉(h脿o)浠嬬垂锛�160KB闁冨瓨

鐗归粸(di菐n)

銆�銆�閬�(y霉n)琛岀壒鎬�

銆�銆�鈥�闆诲鑼冨湇:1.71 ~ 3.6 V

銆�銆�鈥擣lash瀵叆闆诲鑼冨湇:1.71 ~ 3.6 V

銆�銆�鈥�鐠�(hu谩n)澧冩韩搴�:-40鈩儈 105鈩�

銆�銆�鏅�(sh铆)閻�

銆�銆�- 3鑷�32 MHz鏅堕珨鎸暕鍣�

銆�銆�- 32鍗冭但鏅堕珨鎸暕鍣�

銆�銆�-澶氱敤閫旀檪(sh铆)閻樼櫦(f膩)鐢熷櫒

銆�銆�绯荤当(t菕ng)澶栧湇瑷�(sh猫)鍌�

銆�銆�鈥�澶氱ó浣庡姛鑰椾緵闆绘ā寮�

銆�銆�鍩轰簬鎳�(y墨ng)鐢ㄧ▼搴忛渶姹傜殑鍎�(y艒u)鍖�

銆�銆�- 16璺�DMA鎺у埗鍣紝鏈�澶氭敮鎸�63璺�

銆�銆�璜�(q菒ng)姹傛秷鎭�

銆�銆�-澶栭儴鐪嬮杸鐙楃洠(ji膩n)瑕栧櫒

銆�銆�-杌熶欢鐪嬮杸鐙�

銆�銆�-浣庢硠婕忓枤閱掕缃�

銆�銆�瀹夊叏鍜屽畬鏁存�фā濉�

銆�銆�鈥�纭欢CRC妯″锛屾敮鎸佸揩閫熷惊鐠�(hu谩n)

銆�銆�鍐椾綑妾㈡煡

銆�銆�-姣忓��(g猫)鑺墖128浣嶅敮涓�妯�(bi膩o)璀�(sh铆)(ID)铏�(h脿o)

銆�銆�浜烘(j墨)鐣岄潰

銆�銆�-浣庡姛鑰楃‖浠惰Ц鎽稿偝鎰熷櫒鎺ュ彛(TSI)

銆�銆�-閫氱敤杓稿叆/杓稿嚭

涓枃鍙冩暩(sh霉)

鍟嗗搧鍒嗛MCU寰帶鍒跺櫒鍝佺墝NXP(鎭╂櫤娴�)
灏佽LQFP-80鏍稿績铏曠悊鍣�ARM Cortex-M4
鍏�(n猫i)鏍歌(gu墨)鏍�32-浣�閫熷害72MHz
閫ｆ帴鑳藉姏CANbus锛孍BI/EMI锛孖2C锛孖rDA锛孲PI锛孶ART/USART锛孶SB锛孶SB OTG澶栬ō(sh猫)DMA锛孖2S锛孡VD锛孭OR锛孭WM锛學DT
I/O鏁�(sh霉)52绋嬪簭瀛樺劜(ch菙)瀹归噺128KB锛�128K x 8锛�
绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨�闁冨瓨EEPROM瀹归噺2K x 8
RAM澶у皬32K x 8闆诲-渚涢浕(Vcc/Vdd)1.71V ~ 3.6V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒A/D 27x16b; D/A 1x12b鎸暕鍣ㄩ鍨�鍏�(n猫i)閮�
宸ヤ綔婧害-40掳C ~ 105掳C锛圱A锛�瀹夎椤炲瀷琛ㄩ潰璨艰鍨�
鍩烘湰鐢�(ch菐n)鍝佺法铏�(h脿o)MK20DX128HTSUS8542.31.0001
鐢�(ch菐n)鍝佹噳(y墨ng)鐢�-

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

婵曟埃鏁忔劅鎬х瓑绱�(j铆)(MSL)3锛�168 灏忔檪(sh铆)锛�ECCN3A991A2
RoHS鐙�鎱�(t脿i)绗﹀悎 ROHS3 瑕�(gu墨)鑼�REACH鐙�鎱�(t脿i)闈� REACH 鐢�(ch菐n)鍝�

寮曡叧

MK20DX128VLK7鍘熺悊鍦�

MK20DX128VLK7寮曡叧鍦�

mk20dx128vlk7鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

mk20dx128vlk7鍦栫墖

mk20dx128vlk7

mk20dx128vlk7鍙冩暩(sh霉)

  • 鍒堕�犲晢Freescale Semiconductor
  • 鏍稿績ARM Cortex M4
  • 铏曠悊鍣ㄧ郴鍒�MK20DX128
  • 鏁�(sh霉)鎿�(j霉)绺界窔瀵害32 bit
  • 鏈�澶ф檪(sh铆)閻橀牷鐜�72 MHz
  • 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�128 KB
  • 鏁�(sh霉)鎿�(j霉) RAM 澶у皬32 KB
  • 鐗囦笂 ADCYes
  • 宸ヤ綔闆绘簮闆诲1.71 V to 3.6 V
  • 宸ヤ綔婧害鑼冨湇- 40 C to + 105 C
  • 灏佽 / 绠遍珨LQFP-80
  • 瀹夎棰�(f膿ng)鏍�SMD/SMT
  • 灏佽Tray