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PG2L100H-6IFBG676 鏄竴娆惧熀浜� FPGA锛堢従鍫村彲绶ㄧ▼闁�闄ｅ垪锛夋妧琛撶殑楂樻�ц兘鑺墖锛岀敱鐭ュ悕鍗婂皫楂斿粻鍟� Lattice 鎺ㄥ嚭銆傝┎鍨嬭櫉灞簬 Lattice 鐨� CertusPro-NX 绯诲垪锛岄噰鐢ㄥ厛閫茬殑 FinFET 宸ヨ棟鍒堕��锛屽叿鏈夐珮瀵嗗害閭忚集璩囨簮銆佷綆鍔熻�椾互鍙婅睈瀵岀殑鎺ュ彛閬搁爡銆傚叾灏佽褰㈠紡鐐� FBGA676锛岄仼鍚堢敤浜庨�氫俊銆佸伐妤�(y猫)鑷嫊鍖�銆佹苯杌婇浕瀛愪互鍙婂祵鍏ュ紡瑕栬绛夋噳鐢ㄩ牁鍩�銆�
銆�銆�閫欐 FPGA 鑺墖鏀寔澶氱ó楂橀�熸帴鍙ｅ崝璀�锛屽苟鍏х疆浜嗗ぇ瀹归噺鐨� RAM 鍜� DSP 妯″锛岃兘澶犳豢瓒冲京闆滅殑鏁稿瓧淇¤櫉铏曠悊闇�姹�銆傚悓鏅�锛屽畠閭勫叿鍌欓潏娲荤殑閰嶇疆閬搁爡鍜岄珮鍙潬鎬х壒鎬�锛屼娇鍏舵垚鐐虹溇澶氫腑绔� FPGA 鎳夌敤鐨勭悊鎯抽伕鎿�銆�
鍨嬭櫉锛歅G2L100H-6IFBG676
銆�銆�鍝佺墝锛歀attice
銆�銆�绯诲垪锛欳ertusPro-NX
銆�銆�宸ヨ棟绡�(ji茅)榛烇細28nm
銆�銆�閭忚集鍠厓鏁搁噺锛氱磩 10 钀�
銆�銆�RAM 瀹归噺锛�5.3Mb
銆�銆�DSP 妯″鏁搁噺锛�144
銆�銆�I/O 鏁搁噺锛氭渶澶� 342 鍊�
銆�銆�閰嶇疆妯″紡锛歋PI Flash 鎴� JTAG
銆�銆�宸ヤ綔闆诲锛�1.0V 鏍稿績闆诲 / 1.8V I/O 闆诲
銆�銆�鏈�澶ф檪閻橀牷鐜囷細瓒呴亷 500MHz
銆�銆�灏佽褰㈠紡锛欶BGA676
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
PG2L100H-6IFBG676 鍏锋湁浠ヤ笅涓昏鐗规�э細
銆�銆�1. 楂樻�ц兘閭忚集绲愭锛氶噰鐢� Lattice 鐨勪笅涓�浠� FPGA 鏋舵锛屾彁渚涙洿楂樼殑鎬ц兘鍜屾洿浣庣殑寤堕伈銆�
銆�銆�2. 璞愬瘜鐨勬帴鍙ｆ敮鎸侊細鏀寔 PCIe Gen2銆乁SB 3.0銆丩VDS 绛夊绋珮閫熸帴鍙ｅ崝璀帮紝閬╂噳澶氬牬鏅渶姹�銆�
銆�銆�3. 鍏х疆纭牳 IP锛氬寘鎷� PCIe 鎺у埗鍣ㄣ�丏DR 鎺у埗鍣ㄧ瓑鍔熻兘妯″锛岀啊鍖栫郴绲辫ō瑷堝京闆滃害銆�
銆�銆�4. 灏忓瀷鍖栬垏浣庡姛鑰楋細鐩歌純浜庡偝绲� FPGA锛屽叾鍔熻�楅’钁楅檷浣�锛屽悓鏅備繚鎸佽純灏忕殑灏佽灏哄銆�
銆�銆�5. 瀹夊叏鍔熻兘锛氭敮鎸� AES-256 鍔犲瘑銆丼HA-3 瑾嶈瓑绛夊畨鍏ㄦ鍒�锛岀⒑淇濇暩鎿氬偝杓哥殑瀹夊叏鎬с��
銆�銆�6. 鏄撲簬闁嬬櫦(f膩)锛氭惌閰� Lattice 鎻愪緵鐨� Radiant 杌熶欢宸ュ叿閺�锛屾柟渚跨敤鎴堕�茶蹇�熼枊鐧�(f膩)鍜岄璀�銆�
PG2L100H-6IFBG676 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊瑷倷锛氬鐒＄窔鍩虹珯銆佺恫绲′氦鎻涙绛夛紝鎻愪緵楂樻晥鐨勪俊铏熻檿鐞嗚兘鍔�銆�
銆�銆�2. 宸ユキ(y猫)鎺у埗锛氶仼鐢ㄤ簬宸ユキ(y猫)鑷嫊鍖栫郴绲变腑鐨勬暩鎿氶噰闆嗐�佸鏅傛帶鍒剁瓑鍔熻兘銆�
銆�銆�3. 宓屽叆寮忚瑕猴細鍙敤浜庢鍣ㄨ瑕虹郴绲变腑鐨勫湒鍍忚檿鐞�銆佹ā寮忚瓨鍒ョ瓑浠诲嫏銆�
銆�銆�4. 姹借粖闆诲瓙锛氭敮鎸� ADAS锛堥珮绱氶椐涜紨鍔╃郴绲憋級銆佽粖杓変俊鎭妯傜郴绲辩瓑鎳夌敤銆�
銆�銆�5. 閱�(y墨)鐧傝ō鍌欙細濡傝秴鑱叉尝瑷倷銆丆T 鎺冩弿鍎�绛�锛屾彁渚涚簿婧栫殑鏁告摎铏曠悊鑳藉姏銆�
銆�銆�6. 娑堣不椤為浕瀛愮敘鍝侊細渚嬪鐒′汉姗熴�佹櫤鑳藉闆荤瓑闇�瑕侀珮鎬ц兘瑷堢畻鑳藉姏鐨勭敘鍝�銆�
PG2L100H-6IFBG484
銆�銆�PG2L100H-7IFBG676
銆�銆�PG2L150H-6IFBG676
