鏍稿績锛欰RM Cortex-M4
銆�銆�闋荤巼锛�84 MHz
銆�銆�Flash锛�512 KB
銆�銆�SRAM锛�96 KB
銆�銆�GPIO锛氭渶澶�51鍊�
銆�銆�ADC锛�12-bit锛屽�氶��(d谩)2鍊婣DC锛屾渶澶�16鍊嬮�氶亾
銆�銆�DAC锛�12-bit锛�2閫氶亾
銆�銆�瀹氭檪鍣�锛氬�氶仈(d谩)11鍊嬪畾鏅傚櫒
銆�銆�閫氫俊鎺ュ彛锛歎SARTx2銆丼PIx3銆両2Cx2銆乁SB OTG FS銆丆ANx1
銆�銆�灏佽�濓細LQFP64
銆�銆�宸ヤ綔婧�搴︼��-40掳C鑷�+85掳C

STM32F401CBU6TR鍏峰倷浠ヤ笅涓昏�佺壒鎬э細
銆�銆�1. 楂樻�ц兘ARM Cortex-M4鍏�(n猫i)鏍�锛屾敮鎸佺‖浠舵诞榛為亱绠楀柈鍏冿紙FPU锛�锛屽彲椤�钁楁彁鍗囨��(sh霉)瀛椾俊铏熻檿鐞嗚兘鍔涖��
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STM32F401CBU6TR閬╃敤浜庝互涓嬪吀鍨嬫噳(y墨ng)鐢ㄥ牬鏅�锛�
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銆�銆�2. 娑堣不椤為浕瀛愮敘(ch菐n)鍝�锛屽�傚�剁敤闆诲櫒銆侀煶闊胯ō(sh猫)鍌欏拰娓告埐鎺у埗鍣�銆�
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銆�銆�4. 姹借粖闆诲瓙闋�(l菒ng)鍩�锛屽彲鐢ㄤ簬杌婅級淇℃伅濞涙▊绯荤当(t菕ng)銆佽粖韬�鎺у埗妯″�婄瓑銆�
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STM32F401CCU6, STM32F401RBT6, STM32F401RCT6