銆�銆�?鏍稿績:Arm?32浣岰ortex?-M4 CPU鑸嘑PU锛�

銆�銆�鑷�閬╂��(y墨ng)瀵�(sh铆)鏅�(sh铆)鍔犻�熷櫒(ART accelerator?)鍏佽ū寰為杻瀛樹腑0绛夊緟鐙�鎱�(t脿i)鍩�(zh铆)琛�锛岄牷鐜囬珮閬�(d谩)180 MHz锛�

銆�銆�MPU, 225 DMIPS/1.25 DMIPS/MHz

銆�銆�(Dhrystone 2.1)鍜孌SP鎸囦护

銆�銆�?瑷樻喍

銆�銆�-鏈�澶�2 MB鐨勯杻瀛樼祫绻旀垚

銆�銆�鍏╁�堕妧琛屽厑瑷遍倞璁�閭婂��(xi臎)

銆�銆�鈥旀渶澶�256+ 4kb鐨凷RAM锛屽寘鎷�64-KB

銆�銆�鐨凜CM(鏍稿績鑰﹀悎瀛樺劜(ch菙)鍣�)鏁�(sh霉)鎿�(j霉)RAM

銆�銆�-闈堟椿鐨勫�栭儴瀛樺��(ch菙)鎺у埗鍣ㄨ垏up

銆�銆�鍒�32浣嶆暩(sh霉)鎿�(j霉)绺界窔(xi脿n):SRAM, PSRAM锛�

銆�銆�SDRAM/LPSDR锛岀穵婀�

銆�銆�Flash /涓�/ NAND瑷樻喍

銆�銆�?LCD骞跺彛锛�8080/6800妯″紡

銆�銆�?LCD-TFT鎺у埗鍣ㄥ畬鍏ㄥ彲绶ㄧ▼

銆�銆�鍒嗚鲸鐜�(绺藉��搴﹀彲閬�(d谩)4096鍍忕礌锛岀附

銆�銆�楂樺害鍙�閬�(d谩)2048琛�锛屽儚绱犳檪(sh铆)閻樺彲閬�(d谩)83 MHz)

銆�銆�?Chrom-ART鍔犻�熷櫒?澧炲挤(qi谩ng)

銆�銆�鍦栧舰鍏�(n猫i)瀹瑰壍(chu脿ng)寤�(DMA2D)

銆�銆�鏅�(sh铆)閻�锛岄噸缃�鍜屼緵鎳�(y墨ng)绠＄悊

銆�銆�- 1.7 V鑷�3.6 V鎳�(y墨ng)鐢ㄩ浕婧愬拰I/ o

銆�銆�- POR, PDR, PVD鍜孊OR

銆�銆�- 4- 26 MHz鏅堕珨鎸�钑╁��

銆�銆�-鍏�(n猫i)閮�16mhz宸ュ粻(ch菐ng)淇�鍓猂C(1%绮惧害)

銆�銆�- 32 kHz鎸�钑╁櫒鐨凴TC鏍℃簴(zh菙n)

銆�銆�-鍏�(n猫i)閮�32 kHz RC鏍℃簴(zh菙n)

銆�銆�?浣庡姛鑰�

銆�銆�-鐫＄湢銆佸仠姝㈠拰寰呮��(j墨)妯″紡

銆�銆�VBAT鎻愪緵RTC, 20脳32浣嶅倷浠�

銆�銆�瀵勫瓨鍣�+鍙�閬哥��4 KB鍌欎唤SRAM

銆�銆�?3脳12-bit, 2.4 MSPS ADC:澶氶仈(d谩)24鍊�(g猫)閫氶亾

銆�銆�鍜�7.2 MSPS鍦ㄤ笁閲嶄氦閷�(cu貌)妯″紡

銆�銆�?2脳12-bit D/A杞�(zhu菐n)鎻涘櫒

銆�銆�?閫氱敤DMA: 16娴丏MA

銆�銆�鎺у埗鍣ㄨ垏fifo鍜岀獊鐧�(f膩)鏀�鎸�

銆�銆�?鏈�澶�17鍊�(g猫)瀹氭檪(sh铆)鍣�:鏈�澶�12鍊�(g猫)16浣嶅拰2鍊�(g猫)32-

銆�銆�浣嶅畾鏅�(sh铆)鍣ㄩ珮閬�(d谩)180鍏嗚但锛屾瘡鍊�(g猫)鏈�澶�

銆�銆�IC/OC/PWM鎴栬剤娌栬▓(j矛)鏁�(sh霉)鍣ㄥ拰姝ｄ氦(澧為噺)绶ㄧ⒓鍣ㄨ几鍏�