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鍏�(n猫i)鏍革細ARM Cortex-M4
銆€銆€涓婚牷锛氭渶楂�80MHz
銆€銆€闁冨瓨锛�256KB
銆€銆€SRAM锛�32KB
銆€銆€I/O绔彛锛氬閬�(d谩)87鍊�
銆€銆€ADC閫氶亾锛�12浣�锛屽閬�(d谩)12鍊嬮€氶亾
銆€銆€UART鎺ュ彛锛氬閬�(d谩)8鍊�
銆€銆€I2C鎺ュ彛锛氬閬�(d谩)4鍊�
銆€銆€SPI鎺ュ彛锛氬閬�(d谩)4鍊�
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銆€銆€宸ヤ綔闆诲锛�2.9V鑷�3.6V
銆€銆€灏佽褰㈠紡锛歀QFP64

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