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鍣ㄤ欢椤�(l猫i)鍨嬶細FPGA
銆€銆€绯诲垪锛歋partan-6
銆€銆€鍨嬭櫉(h脿o)锛歑A6SLX25-2FTG256Q
銆€銆€閭忚集鍠厓鏁�(sh霉)锛�2389
銆€銆€閰嶇疆闁冨瓨锛氱劇(w煤)鍏�(n猫i)缃�
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆€銆€I/O 鏁�(sh霉)閲忥細170
銆€銆€灏佽椤�(l猫i)鍨嬶細FTG256
銆€銆€宸ヨ棟鍒剁▼锛�45nm
銆€銆€渚涢浕闆诲锛�1.2V 鏍稿績锛�1.5V 杓斿姪
銆€銆€鏈€澶ч牷鐜囷細500 MHz

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