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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫�(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > XAZU3EG-L1SFVA625I

XAZU3EG-L1SFVA625I 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2025/4/30 12:13:20 鏌ョ湅 闁辫畝锛�33

XAZU3EG-L1SFVA625I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨勪竴娆鹃珮绔� FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛夎姱鐗�锛屽爆浜� UltraScale+ 绯诲垪銆傝┎绯诲垪閲囩敤鍏堥��(j矛n)鐨� FinFET 宸ヨ棟鎶�琛�(sh霉)鍒堕�狅紝鍏锋湁楂樻�ц兘銆佷綆鍔熻�楀拰楂樺害闆嗘垚鐨勭壒榛�(di菐n)銆傞�欐 FPGA 鑺墖寤ｆ硾鎳�(y墨ng)鐢ㄤ簬閫氫俊銆佹暩(sh霉)鎿�(j霉)涓績銆佽埅绌鸿埅澶�銆佸伐妤�(y猫)鑷嫊(d貌ng)鍖栦互鍙婇珮鎬ц兘瑷�(j矛)绠楃瓑闋�(l菒ng)鍩�銆�
銆�銆�瑭插瀷铏�(h脿o)涓殑鍏烽珨閰嶇疆浣垮叾閬╃敤浜庨渶瑕侀珮閭忚集瀵嗗害銆侀珮閫熶覆琛岄�ｆ帴鍜屽ぇ瀹归噺瀛樺劜(ch菙)鍣ㄧ殑鎳�(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�

鍙冩暩(sh霉)

绯诲垪锛歎ltraScale+
銆�銆�宸ヨ棟鍒剁▼锛�16nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 340K 鍒� 940K
銆�銆�DSP 妯″鏁�(sh霉)閲忥細~2272 鍒� ~6480
銆�銆�Block RAM锛殈51MB 鑷� ~145MB
銆�銆�宓屽叆寮忓瓨鍎�(ch菙)鍣細鏀寔 DDR4銆丩PDDR4 绛�
銆�銆�鏅�(sh铆)閻橀牷鐜囷細楂橀仈(d谩)鏁�(sh霉) GHz 鐨勫収(n猫i)鏍稿伐浣滈牷鐜�
銆�銆�I/O 鏁�(sh霉)閲忥細澶氶仈(d谩)鏁�(sh霉)鍗冨��(g猫)鐢ㄦ埗 I/O
銆�銆�闆绘簮闆诲锛氭牳蹇冮浕澹撶偤 0.8V锛孖/O 闆诲鏍规摎(j霉)閰嶇疆涓嶅悓鍙敮鎸佸绋(bi膩o)婧�(zh菙n)

鐗规��

XAZU3EG-L1SFVA625I 鎻愪緵浜嗗崜瓒婄殑鎬ц兘鍜岄潏娲绘��锛屽叾涓昏鐗规�у寘鎷細
銆�銆�1. 楂樺害闆嗘垚锛氬叿鍌欒睈瀵岀殑閭忚集璩囨簮銆丏SP 鍠厓鍜屽祵鍏ュ紡瀛樺劜(ch菙)鍣ㄦā濉�锛岃兘澶犳豢瓒冲京(f霉)闆滆ō(sh猫)瑷�(j矛)鐨勯渶姹傘��
銆�銆�2. 楂橀�熸帴鍙ｆ敮鎸侊細鏀寔 PCIe Gen4/Gen5銆丆CIX 鍜� CXL 绛夋渶鏂板崝(xi茅)璀�锛岄仼鐢ㄤ簬鏁�(sh霉)鎿�(j霉)涓績鍔犻�熸噳(y墨ng)鐢�銆�
銆�銆�3. 鍏�(n猫i)閮ㄤ簰鑱�(li谩n)鍎�(y艒u)鍖栵細閫氶亷 UltraScale+ 鏋舵(g貌u)鎻愪緵楂樻晥鐨勫収(n猫i)閮ㄤ簰閫ｇ恫(w菐ng)绲�(lu貌)锛岄檷浣庡欢閬插苟鎻愰珮鍚炲悙閲�銆�
銆�銆�4. 鍔熻�楃鐞嗭細閲囩敤鍕�(d貌ng)鎱�(t脿i)鍔熻�楄(di脿o)绡�(ji茅)鎶�琛�(sh霉)鍜屾櫤鑳芥檪(sh铆)閻橀杸鎺т互娓涘皯鏁撮珨鍔熻��銆�
銆�銆�5. 瀹夊叏鍔熻兘锛氬収(n猫i)缃姞瀵嗗紩鎿庡拰瀹夊叏鍟熷嫊(d貌ng)鍔熻兘锛屼繚闅滅郴绲�(t菕ng)閬�(y霉n)琛岀殑瀹夊叏鎬�銆�
銆�銆�6. 鍙潬鎬у寮�(qi谩ng)锛氱稉(j墨ng)閬庡毚(y谩n)鏍兼脯(c猫)瑭�锛岀⒑淇濆湪妤电鐠�(hu谩n)澧冧笅鐨勫彲闈犻亱(y霉n)琛�锛岀壒鍒ラ仼鍚堣埅绌鸿垏鍦�(gu贸)闃查牁(l菒ng)鍩熶娇鐢�銆�

鎳�(y墨ng)鐢�

瑭茶姱鐗囧洜鍏跺挤(qi谩ng)澶х殑铏曠悊鑳藉姏鍜岄潏娲荤殑瑷�(sh猫)瑷�(j矛)鑳藉姏锛岃寤ｆ硾鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤細濡� 5G 鍩虹珯銆佸厜鍌宠几瑷�(sh猫)鍌欑瓑銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績鍔犻�燂細AI 鎺ㄧ悊鍔犻��銆佹暩(sh霉)鎿�(j霉)鍖呰檿鐞嗐�佸瓨鍎�(ch菙)鍔犻�熺瓑銆�
銆�銆�3. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栵細瀵�(sh铆)鏅�(sh铆)鎺у埗銆佸湒鍍忚檿鐞嗗拰姗�(j墨)鍣ㄤ汉鎶�琛�(sh霉)銆�
銆�銆�4. 閱�(y墨)鐧傛垚鍍忥細瓒呰伈娉��丆T 鎺冩弿绛夐珮鍒嗚鲸鐜囨垚鍍忚ō(sh猫)鍌�銆�
銆�銆�5. 鑸┖鑸ぉ鑸囧湅(gu贸)闃诧細闆烽仈(d谩)绯荤当(t菕ng)銆佽(w猫i)鏄熼�氫俊鍜屽皫(d菐o)鑸郴绲�(t菕ng)銆�
銆�銆�姝ゅ锛屽畠閭勯仼鐢ㄤ簬浠讳綍闇�瑕佸ぇ瑕�(gu墨)妯″苟琛岃▓(j矛)绠楁垨寰�(f霉)闆滅畻娉曞(sh铆)鐝�(xi脿n)鐨勬噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�

鏇夸唬鍨嬭櫉(h脿o)

XAZU3EG-FFVB1156I, XAZU3EG-FFVC1156I

xazu3eg-l1sfva625i鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

xazu3eg-l1sfva625i鍙冩暩(sh霉)

  • 鐝�(xi脿n)鏈夋暩(sh霉)閲�0鐝�(xi脿n)璨ㄦ煡鐪嬩氦鏈�
  • 鍍�(ji脿)鏍�1 : 锟�6,242.26000鎵樼洡
  • 绯诲垪Zynq? UltraScale+? MPSoC EG
  • 鍖呰鎵樼洡
  • 鐢�(ch菐n)鍝佺媭鎱�(t脿i)鍦ㄥ敭
  • 鏋舵(g貌u)MPU锛孎(xi脿n)PGA
  • 鏍稿績铏曠悊鍣�甯� CoreSight? 鐨勫洓鏍� ARM? Cortex?-A53 MPCore?锛屽付 CoreSight? 鐨勯洐鏍� ARM?Cortex?-R5锛孉RM Mali?-400 MP2
  • 闁冨瓨澶у皬-
  • RAM 澶у皬1锛�8MB
  • 澶栬ō(sh猫)DMA锛學DT
  • 閫ｆ帴鑳藉姏CANbus锛孖2C锛孲PI锛孶ART/USART锛孶SB
  • 閫熷害500MHz锛�1.2GHz
  • 涓昏灞��Zynq?UltraScale+? FPGA锛�154K+ 閭忚集鍠厓
  • 宸ヤ綔婧害-40掳C ~ 100掳C锛圱J锛�
  • 灏佽/澶栨625-BFBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗗櫒浠跺皝瑁�625-FCBGA锛�21x21锛�