鍨嬭櫉(h脿o)锛歑C2S100-5FGG256I
銆�銆�绯诲垪锛歋partan-II
銆�銆�渚涙噳(y墨ng)鍟嗭細Xilinx
銆�銆�灏佽�濋�炲瀷锛欶ine Pitch BGA (FBGA)
銆�銆�寮曡叧鏁�(sh霉)锛�256
銆�銆�閰嶇疆瀛樺劜(ch菙)鍣ㄩ�炲瀷锛氶潪鏄撳け鎬� Flash Memory
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細100,000
銆�銆�鏌ユ壘琛� (LUT) 鏁�(sh霉)閲忥細~48,000
銆�銆�RAM 瀹归噺锛�184 Kb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細鐒�
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +85掳C
銆�銆�渚涢浕闆诲�擄細鏍稿績闆诲�� 1.8V锛孖/O 闆诲�� 3.3V 鎴� 2.5V
銆�銆�鏈�澶у伐浣滈牷鐜囷細楂橀仈(d谩) 270 MHz

XC2S100-5FGG256I 鐨勪富瑕佺壒鎬у寘鎷�锛�
銆�銆�1. 楂樻�ц兘鑸囦綆鍔熻�楃殑瀹岀編绲�(ji茅)鍚堬紝浣垮叾闈炲父閬╁悎灏�(du矛)鎴愭湰鏁忔劅浣嗗張瑕佹眰涓�瀹氭�ц兘鐨勬噳(y墨ng)鐢�銆�
銆�銆�2. 鍏�(n猫i)缃�闁冨瓨閰嶇疆瀛樺��(ch菙)鍣�锛岀劇闇�澶栨帴椤嶅�栫殑閰嶇疆鑺�鐗囧嵆鍙�姝ｅ父閬�(y霉n)琛屻��
銆�銆�3. 鏀�鎸佸�氱ó閰嶇疆妯″紡锛屽�� Master Serial銆丼lave Serial 鍜� Boundary Scan 绛夈��
銆�銆�4. 鎻愪緵澶氶仈(d谩) 256 鍊�(g猫) I/O 寮曡叧锛屽叿鍌欓潏娲荤殑 I/O 妯�(bi膩o)婧�(zh菙n)鍏煎�规��锛屼緥濡� LVCMOS銆丩VDS 鍜� SSTL銆�
銆�銆�5. 鍏�(n猫i)閮ㄩ泦鎴愪簡澶ч噺鍒嗗竷寮� RAM 鍜屽�婄媭 RAM 璩囨簮锛屽彲浠ョ敤浜庡��(sh铆)鐝�(xi脿n)寰�(f霉)闆滅殑瀛樺劜(ch菙)鍣ㄧ祼(ji茅)妲�(g貌u)銆�
銆�銆�6. 鎻愪緵纭�鏍� DCM锛堟暩(sh霉)瀛楁檪(sh铆)閻樼�＄悊妯″�婏級锛岀敤浜庢檪(sh铆)閻樺垎闋汇�佸�嶉牷鍙婄浉浣嶈��(di脿o)鏁�銆�
銆�銆�7. 鏀�鎸� JTAG 閭婄晫鎺冩弿娓�(c猫)瑭﹀姛鑳斤紝鏂逛究閫�(j矛n)琛岃��(di脿o)瑭﹀拰瑷烘柗銆�
銆�銆�8. 鍙�閫氶亷 Xilinx ISE Design Suite 閫�(j矛n)琛岀稖鍚�銆佸竷灞�甯冪窔鍜屼豢鐪熺瓑鎿嶄綔銆�

XC2S100-5FGG256I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宓屽叆寮忚檿鐞嗗櫒绯荤当(t菕ng)鐨勮ō(sh猫)瑷�(j矛)鑸囬枊鐧�(f膩)銆�
銆�銆�2. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栨帶鍒剁郴绲�(t菕ng)涓�鐨勬��(sh霉)鎿�(j霉)閲囬泦鑸囪檿鐞嗐��
銆�銆�3. 瑕栭牷鑸囧湒鍍忚檿鐞嗛牁(l菒ng)鍩�锛屽�傝�栭牷鏍煎紡杞�(zhu菐n)鎻涖�佸湒鍍忓�炲��(qi谩ng)绛�銆�
銆�銆�4. 閫氫俊瑷�(sh猫)鍌欎腑鐨勫崝(xi茅)璀拌綁(zhu菐n)鎻涘拰淇¤櫉(h脿o)铏曠悊锛屼緥濡備互澶�缍�(w菐ng)浜ゆ彌姗�(j墨)鎴栬矾鐢卞櫒銆�
銆�銆�5. 娑堣不(f猫i)椤為浕瀛愮敘(ch菐n)鍝佷腑鐨勯煶闋�/瑕栭牷绶ㄨВ纰煎拰鎺ュ彛姗嬫帴銆�
銆�銆�6. 娓�(c猫)瑭︽脯(c猫)閲�?j墨)x鍣ㄤ腑鐨勪俊铏�(h脿o)鐢熸垚鑸囧垎鏋愩��
銆�銆�7. 閱�(y墨)鐧傝ō(sh猫)鍌欎腑鐨勫��(sh铆)鏅�(sh铆)鏁�(sh霉)鎿�(j霉)铏曠悊鍜岄’绀烘帶鍒�銆�
銆�銆�8. 姹借粖闆诲瓙绯荤当(t菕ng)鐨勫偝鎰熷櫒铻嶅悎鍜屾暩(sh霉)鎿�(j霉)鍌宠几銆�

XC2S100E-5FGG256C