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鎻忚堪	闆嗘垚闆昏矾FPGA 176 I/O 256FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)

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鐢�(ch菐n)鍝佸瀷铏�	XC2S200-5FG256C
鎻忚堪	闆嗘垚闆昏矾FPGA 176 I/O 256FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)

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姝愮洘RoHS鎸囦护	鏄�
鐙€鎱�(t脿i)	NRFND
鏈€澶ф檪閻橀牷鐜�	263.0鍏嗚但
CLB-Max鐨勭祫鍚堝欢閬�	0.7绱嶇
JESD-30浠ｇ⒓	S-PBGA-B256
JESD-609浠ｇ⒓	1铏�
绺絉AM浣�	57344
CLB鏁�(sh霉)閲�	1176.0
绛夋晥闁€鏁�(sh霉)	200000.0
杓稿叆鏁�(sh霉)閲�	284.0
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杓稿嚭鏁�(sh霉)閲�	284.0
绔瓙鏁�(sh霉)	256
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鏈€楂樺伐浣滄韩搴�	85鈩�
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宄板€煎洖娴佹韩搴�(鈩�)	260
闆绘簮	1.5 / 3.3,2.5
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搴ч珮	2.0姣背
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瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
婧害绛夌礆	鍏朵粬
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绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅傞枔@宄板€煎洖娴佹韩搴︽渶澶у€�(绉�)	30
闀峰害	17.0姣背
瀵害	17.0姣背
闄勫姞鍔熻兘	鏈€澶у彲鐢ㄩ杸鏁�(sh霉)200000
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	BGA
鍖呰绛夋晥浠ｇ⒓	BGA256,16X16,40
鍖呰褰㈢媭	寤ｅ牬
鍖呰褰㈠紡	缍�(w菐ng)鏍奸櫍鍒�
鍒堕€犲晢鍖呰瑾槑	FBGA-256