XC3S1400A-4FGG484C 鏅�(sh铆)闁擄細2023/7/12 11:00:15 闁辫畝锛�947

鎻忚堪

銆€銆€XC3S1400A-4FGG484C鏄摯(ku貌)灞昐partan-3A绯诲垪鐨勪竴閮ㄥ垎锛岃┎绯诲垪閭勫寘鎷潪鏄撳け鎬partan-3AN鍜屾洿楂樺瘑搴︾殑Spartan-3A DSP FPGA銆係partan-3A绯诲垪寤虹珛鍦ㄦ棭鏈烻partan-3E鍜孲partan-3FPGA绯诲垪鐨勬垚鍔熷熀绀�(ch菙)涓娿€傛柊鍔熻兘鎻愰珮浜嗙郴绲�(t菕ng)鎬ц兘骞堕檷浣庝簡閰嶇疆鎴愭湰銆傞€欎簺Spartan-3A绯诲垪澧炲挤(qi谩ng)鍔熻兘鑸囩稉(j墨ng)閬庨(y脿n)璀夌殑90nm宸ヨ棟鎶€琛�(sh霉)鐩哥祼(ji茅)鍚�锛屾彁渚涙瘮浠ュ線鏇村鐨勫姛鑳藉拰甯跺锛岀偤鍙法绋嬮倧杓妤�(y猫)妯圭珛浜嗘柊妯�(bi膩o)婧�(zh菙n)銆傜敱浜庢垚鏈サ浣�锛孹C3S1400A-4FGG484C闈炲父閬╁悎寤ｆ硾鐨勬秷璨�(f猫i)闆诲瓙鎳�(y墨ng)鐢紝鍖呮嫭瀵付鎺ュ叆銆佸搴恫(w菐ng)绲�(lu貌)銆侀’绀�/鎶曞奖鍜屾暩(sh霉)瀛楅浕瑕栬ō(sh猫)鍌�銆�

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�(h脿o)	XC3S1400A-4FGG484C
鎻忚堪	闆嗘垚闆昏矾FPGA 375 I / O 484FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪)
鍒堕€犲晢	Xilinx鍏徃
绯诲垪	Spartan?-3A
闆诲-闆绘簮	1.14V?1.26V
宸ヤ綔婧害	0掳C?85掳C(TJ)
鍖呰/绠�	484-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	484-FBGA(23x23)
鍩烘湰闆朵欢铏�(h脿o)	XC3S1400A

鐢�(ch菐n)鍝佸湒鐗�

XC3S1400A-4FGG484C

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鐢�(ch菐n)鍝佺ó椤�	FPGA - 鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪
绯诲垪	XC3S1400A
闆朵欢鐙€鎱�(t脿i)	娲绘€�
LAB / CLB鐨勬暩(sh霉)閲�	2816
閭忚集鍏冪礌/鍠厓鏁�(sh霉)	25344
绺絉AM浣�	589824
I/O鏁�(sh霉)閲�	375
闋荤巼	250鍏嗚但
宸ヤ綔闆绘簮闆诲	1 V
鏈€灏忓伐浣滄韩搴�	0鈩�
鏈€澶у伐浣滄韩搴�	+ 85鈩�
鍒嗗竷寮廟AM	176 kbit
鍏�(n猫i)宓屽紡濉奟AM - EBR	576 kbit
楂樺害	1.7姣背
闀�(zh菐ng)搴�	23姣背
瀵害	23姣背
鍖呰	鎵樼洡
瀹夎椤炲瀷	琛ㄩ潰璨艰
灏佽/绠遍珨	FCBGA-484

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

RoHS鐙€鎱�(t脿i)	绗﹀悎ROHS3
姘村垎鏁忔劅鎬ф按骞�(MSL)	3(168灏忔檪(sh铆))

CAD妯″瀷

XC3S1400A-4FGG484C绗﹁櫉(h脿o)

XC3S1400A-4FGG484C鑵冲嵃

灏佽

XC3S1400A-4FGG484C灏佽

鏇夸唬鍨嬭櫉(h脿o)

鍨嬭櫉(h脿o)	鍒堕€犲晢	鍝佸悕	鎻忚堪
XC3S1400A-4FGG484I	璩介潏鎬�	FPGA鑺墖	1.4M Gates 25344Cells 667MHz 90nm Technology 1.2V 484Pin FBGA
XC3S1400A-5FGG484C	璩介潏鎬�	FPGA鑺墖	1.4M Gates 25344 Cells 770MHz 90nm Technology 1.2V 484-Pin FBGA
XC3S1400A-4FGG676C	璩介潏鎬�	FPGA鑺墖	1.4M Gates 25344 Cells 667MHz 90nm Technology 1.2V 676Pin FBGA
XC3S1400A-4FTG256C	璩介潏鎬�	FPGA鑺墖	1.4M Gates 25344 Cells 667MHz 90nm Technology 1.2V 256Pin FTBGA