鏅傞枔锛�2022/10/26 14:02:24
闁辫畝锛�787
鐢�(ch菐n)鍝佸瀷铏� | XC3S5000-4FGG676I |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 489 I/O 676FBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鐢�(ch菐n)鍝佸瀷铏� | XC3S5000-4FGG676I |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 489 I/O 676FBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鍒堕�犲晢 | Xilinx鍏徃 |
绯诲垪 | Spartan?-3 |
闆朵欢鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮 | 1.14V1.26V |
宸ヤ綔婧害 | -40掳C100掳C(TJ) |
鍖呰/绠� | 676-BGA |
渚涙噳鍟嗚ō鍌欏寘瑁� | 676-FBGA(27x27) |
鍩烘湰闆朵欢铏� | XC3S5000 |
閭忚集璩囨簮
闋荤巼鍚堟垚
楂樺垎杈ㄧ巼鐩哥Щ
鐒￠墰鍖呰閬搁爡
娑堥櫎鏅傞悩鍋忔枩
SelectIO 鎺ュ彛淇′护
澶氶仈633鍊婭 / O寮曡叧
18绋柈绔俊铏熸婧�
閫氶亷鏁�(sh霉)鎺ч樆鎶楃鎺�
瀵�锛屽揩閫熷璺京鐢ㄥ櫒
蹇�熸彁鍓嶉�蹭綅閭忚集
灏堢敤18 x 18涔樻硶鍣�
淇¤櫉鎿哄箙鐐�1.14V鑷�3.465V
闆欏�嶆暩(sh霉)鎿�(j霉)閫熺巼(DDR)鏀寔
姹借粖Spartan-3 XA绯诲垪璁婇珨
SelectRAM 鍒嗗堡瀛樺劜鍣�
鍏鍏ㄥ眬鏅傞悩绶氬拰璞愬瘜鐨勮矾鐢�
瀵嗗害楂橀仈74,880鍊嬮倧杓柈鍏�
楂橀仈1,872 Kbit鐨勭附Block RAM
楂橀仈520 Kbit鐨勭附鍒嗗竷寮廟AM
鏁�(sh霉)瀛楁檪閻樼鐞嗗櫒(鏈�澶氬洓鍊婦CM)
姣忓�婭 / O 622+ Mb / s鏁�(sh霉)鎿�(j霉)鍌宠几閫熺巼
8绋樊鍒咺 / O妯欐簴锛屽寘鎷琇VDS锛孯SDS
DDR锛孌DR2 SDRAM鏀寔鏈�楂�333 Mb / s
鍏锋湁绉讳綅瀵勫瓨鍣ㄥ姛鑳界殑璞愬瘜閭忚集鍠厓
鑸嘔EEE 1149.1 / 1532鍏煎鐨凧TAG閭忚集
XilinxISE 鍜學ebPACK 杌熶欢闁嬬櫦(f膩)绯荤当(t菕ng)瀹屽叏鏀寔
閬╃敤浜庡ぇ鎵归噺锛岄潰鍚戞秷璨昏�呯殑鎳夌敤鐨勪綆鎴愭湰锛岄珮鎬ц兘閭忚集瑙ｆ焙鏂规
MicroBlaze 鍜孭icoBlaze 铏曠悊鍣�锛孭CI 锛孭CIExpress PIPE绔粸鍜屽叾浠朓P鍏�(n猫i)鏍�
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
绗﹀悎REACH | 鏄� |
绗﹀悎姝愮洘RoHS | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
鏈�澶ф檪閻橀牷鐜� | 630.0鍏嗚但 |
CLB-Max鐨勭祫鍚堝欢閬� | 0.61绱嶇 |
JESD-30浠ｇ⒓ | S-PBGA-B676 |
JESD-609浠ｇ⒓ | 1铏� |
绺絉AM浣� | 1916928 |
CLB鏁�(sh霉)閲� | 8320.0 |
绛夋晥闁�鏁�(sh霉) | 5000000.0 |
杓稿叆鏁�(sh霉)閲� | 489.0 |
閭忚集鍠厓鏁�(sh霉) | 74880.0 |
杓稿嚭鏁�(sh霉)閲� | 489.0 |
绔瓙鏁�(sh霉) | 676 |
绲勭箶 | 8320 CLBS锛�5000000闁� |
宄板�煎洖娴佹韩搴�(鈩�) | 250 |
闆绘簮 | 1.2,1.2 / 3.3,2.5 |
璩囨牸鐙�鎱�(t脿i) | 涓嶅悎鏍� |
搴ч珮 | 2.6姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲妯欑ū | 1.2浼� |
鏈�灏忎緵闆婚浕澹� | 1.14浼� |
鏈�澶ч浕婧愰浕澹� | 1.26浼� |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛� | CMOS |
绲傜瀹屾垚 | 閷�/閵�/閵�(Sn95.5Ag4.0Cu0.5) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴︽渶澶у��(绉�) | 30 |
闀峰害 | 27.0姣背 |
瀵害 | 27.0姣背 |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | BGA |
鍖呰绛夋晥浠ｇ⒓ | BGA676,26X26,40 |
鍖呰褰㈢媭 | 寤ｅ牬 |
鍖呰褰㈠紡 | 缍�(w菐ng)鏍奸櫍鍒� |
鍒堕�犲晢鍖呰瑾槑 | 27 X 27 MM锛岀劇閴�锛孎(xi脿n)BGA-676 |
