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XC4VSX25-12FFG668C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-4 绯诲垪 FPGA 鑺墖锛屽爆浜� SX锛堜覆琛屽偝杓稿劒(y艒u)鍖栵級绯诲垪銆傝┎鑺墖閲囩敤鍏堥�茬殑 90nm 鍒剁▼宸ヨ棟锛屽皥鐐洪珮鎬ц兘銆侀珮瀵嗗害鐨勬暩(sh霉)瀛椾俊铏熻檿鐞嗗拰閫氫俊鎳夌敤瑷▓銆傚畠鍏�(n猫i)缃睈瀵岀殑閭忚集璩囨簮銆佹暩(sh霉)瀛椾俊铏熻檿鐞嗗櫒 (DSP) 妯″浠ュ強澶у閲忓祵鍏ュ紡瀛樺劜鍣�锛岃兘澶犳豢瓒冲京闆滅郴绲�(t菕ng)鐨勮ō瑷堥渶姹傘��
銆�銆�Virtex-4 绯诲垪浠ュ叾闈堟椿鐨勬灦妲�銆佷綆鍔熻�楃壒鎬у拰楂樺害闆嗘垚鐨勭壒榛炶�岃仦鍚嶃�俋C4VSX25-12FFG668C 鎻愪緵浜嗗閬� 25,000 鍊嬮倧杓柈鍏冿紝骞舵敮鎸佸绋珮閫熶覆琛屾帴鍙ｏ紝渚嬪 RocketIO 鏀剁櫦(f膩)鍣�锛岄潪甯搁仼鍚堥渶瑕侀珮甯跺鏁�(sh霉)鎿�(j霉)鍌宠几?sh霉)鑶筋�茶劆榧嶅晩?/p>
鍨嬭櫉锛歑C4VSX25-12FFG668C
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛歏irtex-4 SX
銆�銆�鍒剁▼宸ヨ棟锛�90nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細25,000
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)閮ㄩ杻瀛�
銆�銆�I/O 鏁�(sh霉)閲忥細476
銆�銆�灏佽椤炲瀷锛欶FG668
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹� 1.2V锛孖/O 闆诲 1.8V/2.5V/3.3V
銆�銆�鐗规�э細RocketIO 鏀剁櫦(f膩)鍣�銆丅lock RAM銆丏SP Slice
XC4VSX25-12FFG668C 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘鏋舵锛氶噰鐢� Virtex-4 鐨勭当(t菕ng)涓�鏋舵锛屾彁渚涢潏娲荤殑閭忚集璩囨簮鍒嗛厤鍜屽劒(y艒u)鍖栫殑鏁�(sh霉)鎿�(j霉)璺緫銆�
銆�銆�2. 澶ц(gu墨)妯￠倧杓硣婧愶細鍖呭惈 25K 閭忚集鍠厓锛岄仼鍚堝京闆滅殑绠楁硶瀵︾従(xi脿n)鍜屽ぇ瑕�(gu墨)妯￠浕璺ō瑷堛��
銆�銆�3. 鍏�(n猫i)缃� DSP 妯″锛氭瘡鍊� DSP Slice 鎻愪緵 18x18 鐨勪箻娉曞櫒鍜岀疮鍔犲姛鑳�锛屾敮鎸侀珮鏁堟暩(sh霉)瀛椾俊铏熻檿鐞嗐��
銆�銆�4. 宓屽叆寮忓瓨鍎插櫒锛氬叿鍌� 11Mb 鐨� Block RAM 鍜屽垎甯冨紡 RAM锛岀敤浜庣珐瀛樺拰鏁�(sh霉)鎿�(j霉)瀛樺劜銆�
銆�銆�5. 楂橀�熶覆琛岄�ｆ帴锛氶泦鎴愪簡 12 鍊� RocketIO 鏀剁櫦(f膩)鍣�锛屾敮鎸侀珮閬� 6.5Gbps 鐨勬暩(sh霉)鎿�(j霉)閫熺巼锛岄仼鐢ㄤ簬鍏夌簴閫氫俊鍜屽叾浠栭珮閫熸噳鐢ㄥ牬鏅�銆�
銆�銆�6. 鍔熻�楃鐞嗭細鏀寔鍕曟厠(t脿i)鍔熻�楄绡�(ji茅)鍜屾檪閻橀杸鎺ф妧琛�锛屾湁鏁堥檷浣庣郴绲�(t菕ng)鑳借�椼��
銆�銆�7. 瀹夊叏鎬э細閫氶亷姣旂壒娴佸姞瀵嗗拰纭欢椹楄瓑姗熷埗淇濊鐭ヨ瓨鐢�(ch菐n)娆�銆�
銆�銆�8. 鍙潬鎬э細缍�(j墨ng)閬庡毚鏍兼脯瑭�锛岄仼鐢ㄤ簬宸ユキ(y猫)绱氬拰鍟嗘キ(y猫)绱氱挵(hu谩n)澧冦��
XC4VSX25-12FFG668C 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊瑷倷锛氬鐒＄窔鍩虹珯銆佽矾鐢卞櫒銆佷氦鎻涙绛�锛屾彁渚涢珮閫熸暩(sh霉)鎿�(j霉)铏曠悊鍜屽偝杓歌兘鍔�銆�
銆�銆�2. 瑕栭牷铏曠悊锛氭敮鎸侀珮娓呰闋荤法纰笺�佽В纰煎拰鍦栧儚铏曠悊锛屾豢瓒冲唬鎾拰鐩�(ji膩n)鎺х郴绲�(t菕ng)闇�姹傘��
銆�銆�3. 閱�(y墨)鐧傞浕瀛愶細鐢ㄤ簬閱�(y墨)鐧傛垚鍍忓拰瑷烘柗瑷倷涓殑瀵︽檪鏁�(sh霉)鎿�(j霉)閲囬泦鑸囪檿鐞嗐��
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栵細瀵︾従(xi脿n)寰╅洔鐨勬帶鍒剁畻娉曞拰楂樼簿搴﹂亱鍕曟帶鍒�銆�
銆�銆�5. 娓│娓噺锛氱偤楂樻�ц兘绀烘尝鍣�銆佷俊铏熺櫦(f膩)鐢熷櫒绛夊剙鍣ㄦ彁渚涙牳蹇冭▓绠楄兘鍔�銆�
銆�銆�6. 宓屽叆寮忕郴绲�(t菕ng)锛氫綔鐐轰富鎺ц姱鐗囨垨鍗�(xi茅)铏曠悊鍣�锛屽寮风郴绲�(t菕ng)鐨勫姛鑳藉拰鎬ц兘銆�
銆�銆�鍏堕潏娲绘�у拰楂樻�ц兘浣垮叾鎴愮偤瑷卞楂樼鎶�闋樺煙鐨勭悊鎯抽伕鎿囥��
XC4VSX35-12FFG668C, XC4VSX55-12FFG668C, XC4VSX25-10FFG668C
