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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫�(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XC5VLX330-1FF1760C

XC5VLX330-1FF1760C 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2025/5/16 15:06:15 鏌ョ湅 闁辫畝锛�19

XC5VLX330-1FF1760C鏄疿ilinx鍏徃鎺ㄥ嚭鐨刅irtex-5绯诲垪FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛変腑鐨勪竴鍊�(g猫)鍨嬭櫉(h脿o)銆傝┎绯诲垪鍣ㄤ欢鍩轰簬鍏堥��(j矛n)鐨�65nm宸ヨ棟鎶�琛�(sh霉)鍒堕��锛屽叿鏈夐珮鎬ц兘銆侀珮闆嗘垚搴﹀拰闈堟椿鎬х殑鐗归粸(di菐n)銆俋C5VLX330-1FF1760C鎿佹湁璞愬瘜鐨勯倧杓硣婧愩�佹暩(sh霉)瀛椾俊铏�(h脿o)铏曠悊(DSP)妯″浠ュ強澶氱ó鎺ュ彛閬搁爡(xi脿ng)锛岄仼鍚堢敤浜庨�氫俊銆佸伐妤�(y猫)鎺у埗銆侀啱(y墨)鐧傛垚鍍�銆佽粛浜嬮浄閬�(d谩)绛夐牁(l菒ng)鍩熺殑寰�(f霉)闆滆ō(sh猫)瑷�(j矛)銆�
銆�銆�Virtex-5绯诲垪鎻愪緵涓夌ó鏋舵(g貌u)锛歀X锛堥倧杓劒(y艒u)鍖栵級銆丼X锛堜覆琛岄�ｆ帴鍎�(y艒u)鍖栵級銆丗X锛堝祵鍏ュ紡铏曠悊鍣ㄥ劒(y艒u)鍖栵級銆俋C5VLX330灞簬LX绯诲垪锛屽皥娉ㄤ簬閭忚集鎬ц兘鍜岃硣婧愭摯(ku貌)灞曟��銆�

鍙冩暩(sh霉)

鍨嬭櫉(h脿o)锛歑C5VLX330-1FF1760C
銆�銆�灏佽椤炲瀷锛欶FG1760
銆�銆�閫熷害绛夌礆(j铆)锛�-1
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱�33钀�
銆�銆�Block RAM瀹归噺锛氱磩20MB
銆�銆�DSP Slice鏁�(sh霉)閲忥細1080
銆�銆�I/O寮曡叧鏁�(sh霉)閲忥細鏈�澶�1049
銆�銆�閰嶇疆妯″紡锛歋electMAP銆丮aster/Slave Serial銆丅PI銆丣TAG
銆�銆�宸ヤ綔闆诲锛氭牳蹇冮浕澹�1.0V锛孖/O闆诲1.8V/2.5V/3.3V
銆�銆�鏈�澶ф檪(sh铆)閻橀牷鐜囷細瓒呴亷550MHz

鐗规��

XC5VLX330-1FF1760C鍏峰倷浠ヤ笅涓昏鐗规�э細
銆�銆�1. 楂樻�ц兘鏋舵(g貌u)锛氶噰鐢ˋSMBL锛圓dvanced Scalable Modular Block Architecture锛夋妧琛�(sh霉)锛岃兘澶犻珮鏁堝(sh铆)鐝�(xi脿n)寰�(f霉)闆滅殑鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊鍜岄倧杓姛鑳姐��
銆�銆�2. 寮�(qi谩ng)澶х殑DSP鑳藉姏锛氬収(n猫i)缃�1080鍊�(g猫)DSP48A Slice锛屾敮鎸侀珮閬�(d谩)550MHz鐨勯亱(y霉n)绠楅牷鐜囷紝闈炲父閬╁悎楂樻�ц兘瑷�(j矛)绠椾换鍕�(w霉)銆�
銆�銆�3. 澶у閲廈lock RAM锛氭彁渚涚磩20MB鐨勫垎甯冨紡RAM鍜屽鐙�RAM锛屾豢瓒冲ぇ瑕�(gu墨)妯℃暩(sh霉)鎿�(j霉)绶╁瓨闇�姹�銆�
銆�銆�4. 闈堟椿鐨処/O鏀寔锛氬閬�(d谩)1049鍊�(g猫)鐢ㄦ埗鍙敤I/O寮曡叧锛屾敮鎸佸绋(bi膩o)婧�(zh菙n)鎺ュ彛鍗�(xi茅)璀帮紙濡侾CI Express銆佸崈鍏嗕互澶恫(w菐ng)銆丷ocketIO绛夛級銆�
銆�銆�5. 宓屽叆寮忓瓨鍎�(ch菙)鍣ㄥ拰涔樻硶鍣細鏀寔鍚勭ó宓屽叆寮忓瓨鍎�(ch菙)鍣ㄧ敓鎴愬櫒锛屽苟鍖呭惈澶ч噺鐨�18x18浣嶅祵鍏ュ紡涔樻硶鍣ㄣ��
銆�銆�6. 鍏堥��(j矛n)鐨勯浕婧愮鐞嗭細閫氶亷鍕�(d貌ng)鎱�(t脿i)鍔熻�楄(di脿o)绡�(ji茅)鎶�琛�(sh霉)闄嶄綆鏁撮珨鍔熻��锛屾彁楂樼郴绲�(t菕ng)鏁堢巼銆�
銆�銆�7. 鏀寔閮ㄥ垎閲嶉厤缃細鍏佽ū鍦ㄩ亱(y霉n)琛屾檪(sh铆)灏�(du矛)FPGA鐨勯儴鍒嗗崁(q奴)鍩熼��(j矛n)琛岄噸鏂伴厤缃�锛屽緸鑰屽劒(y艒u)鍖栬硣婧愬埄鐢ㄥ拰鍔熻兘鎿�(ku貌)灞�銆�

鎳�(y墨ng)鐢�

XC5VLX330-1FF1760C寤ｆ硾鎳�(y墨ng)鐢ㄤ簬闇�瑕侀珮鎬ц兘瑷�(j矛)绠楀拰寰�(f霉)闆滈倧杓檿鐞嗙殑闋�(l菒ng)鍩燂紝鍖呮嫭浣嗕笉闄愪簬锛�
銆�銆�1. 閫氫俊瑷�(sh猫)鍌欙細鍩哄付铏曠悊銆佷俊閬撶法纰�銆佽(di脿o)鍒惰В瑾�(di脿o)绛夊姛鑳�銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栵細瀵�(sh铆)鏅�(sh铆)鎺у埗銆佸湒鍍忚檿鐞�銆侀亱(y霉n)鍕�(d貌ng)鎺у埗绛夊牬(ch菐ng)鏅�銆�
銆�銆�3. 閱�(y墨)鐧傝ō(sh猫)鍌欙細瓒呰伈娉㈡垚鍍�銆丆T鎺冩弿鍔犻��銆佷俊铏�(h脿o)閲囬泦鑸囪檿鐞�銆�
銆�銆�4. 杌嶄簨鍙婅埅绌鸿埅澶╋細闆烽仈(d谩)淇¤櫉(h脿o)铏曠悊銆佸皫(d菐o)鑸郴绲�(t菕ng)銆佽(w猫i)鏄熼�氫俊绛�銆�
銆�銆�5. 鏁�(sh霉)鎿�(j霉)涓績锛氶珮閫熸暩(sh霉)鎿�(j霉)鍌宠几銆佺恫(w菐ng)绲�(lu貌)浜ゆ彌銆佹湇鍕�(w霉)鍣ㄥ嵏杓夌瓑鍔熻兘銆�
銆�銆�6. 娓�(c猫)瑭﹀垎鏋愬剙绛夊剙鍣ㄧ殑鏍稿績鎺у埗鑸囦俊铏�(h脿o)铏曠悊鍠厓銆�

鏇夸唬鍨嬭櫉(h脿o)

XC5VLX330T-1FF1760C
銆�銆�XC5VLX330-1FFG1735C
銆�銆�XC5VLX330T-1FFG1735C

xc5vlx330-1ff1760c鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

xc5vlx330-1ff1760c鍙冩暩(sh霉)

  • 妯�(bi膩o)婧�(zh菙n)鍖呰1
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛�
  • 绯诲垪Virtex®-5 LX
  • LAB/CLB鏁�(sh霉)25920
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)331776
  • RAM 浣嶇附瑷�(j矛)10616832
  • 杓稿叆/杓稿嚭鏁�(sh霉)1200
  • 闁�鏁�(sh霉)-
  • 闆绘簮闆诲0.95 V ~ 1.05 V
  • 瀹夎椤炲瀷琛ㄩ潰璨艰
  • 宸ヤ綔婧害0°C ~ 85°C
  • 灏佽/澶栨1760-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�1760-FCBGA
  • 閰嶇敤568-5088-ND - BOARD DEMO DAC1408D750HW-V5-ML525-UNI-G-ND - EVAL PLATFORM ROCKET IO VIRTEX-5HW-AFX-FF1760-500-G-ND - BOARD DEV VIRTEX 5 FF1760