灏佽�濓細FFG665
銆�銆�閫熷害绛夌礆锛�-1
銆�銆�閰嶇疆闁冨瓨锛氫笉鍏�(n猫i)缃�
銆�銆�鍏�(n猫i)鏍搁浕澹擄細1.0V
銆�銆�I/O闆诲�擄��1.8V, 2.5V, 3.3V
銆�銆�FPGA绯诲垪锛歏irtex-5 SX
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱�5钀�
銆�銆�DSP Slice鏁�(sh霉)閲忥細420鍊�
銆�銆�RAM瀹归噺锛�2700 Kb
銆�銆�鏈�澶х敤鎴禝/O鏁�(sh霉)锛�484
銆�銆�閰嶇疆妯″紡锛歋lave Serial, Master SelectMAP, Slave BPI

XC5VSX50T-1FF665C閲囩敤65nm CMOS宸ヨ棟鍒堕��锛屽叿鏈夊嚭鑹茬殑鎬ц兘鍔熻�楁瘮銆�
銆�銆�瑭茶姱鐗囧叿鍌欏挤澶х殑淇¤櫉铏曠悊鑳藉姏锛屾搧鏈�420鍊婦SP Slice锛屾瘡鍊婼lice鍏�(n猫i)閮ㄩ泦鎴愪簡灏堢敤涔樻硶鍣ㄥ拰鍔犳硶鍣�锛屽彲浠ラ’钁楀姞閫熸暩(sh霉)鍊艰▓绠椾换鍕�(w霉)銆�
銆�銆�鑺�鐗囧寘鍚�澶ч噺宓屽叆寮忓�婂瓨鍎插櫒锛圔lock RAM锛�锛岀附?c猫)钀樼獰_鍒�2700 Kb锛岄仼鍚堢珐瀛樻暩(sh霉)鎿�(j霉)鎴�?q奴)宕縁(xi脿n)FIFO绛夊姛鑳�銆�
銆�銆�Virtex-5绯诲垪鏀�鎸佸�氱ó閰嶇疆妯″紡锛屽厑瑷遍�氶亷澶栭儴闁冨瓨鎴栭厤缃�瑷�(sh猫)鍌欏姞杓夋瘮鐗规祦銆�
銆�銆�姝�FPGA閭勬彁渚涢潏娲荤殑鏅傞悩绠＄悊鍔熻兘锛岄泦鎴愭湁鏁�(sh霉)瀛楁檪閻樼�＄悊妯″�婏紙DCM锛夊拰閹栫浉鐠�(hu谩n)锛圥LL锛�锛屽彲鐢熸垚绮剧⒑鐨勬檪閻樹俊铏熶互婊胯冻涓嶅悓鎳�(y墨ng)鐢ㄥ牬鏅�鐨勯渶姹�銆�
銆�銆�姝ゅ��锛屽畠鍏煎�瑰�氱ó楂橀�熶覆琛屾帴鍙ｆ�欐��锛屼緥濡侾CI Express銆佸崈鍏嗕互澶�缍�(w菐ng)鍜孉urora锛屼究浜庤垏鍏朵粬瑷�(sh猫)鍌欎簰鑱�(li谩n)銆�

XC5VSX50T-1FF665C寤ｆ硾鎳�(y墨ng)鐢ㄤ簬闇�瑕侀珮鎬ц兘淇¤櫉铏曠悊鐨勫牬鏅�涓�锛屽�傦��
銆�銆�1. 鐒＄窔閫氫俊鍩虹珯涓�鐨勫熀甯惰檿鐞嗗柈鍏�锛岀敤浜庡�︾��(xi脿n)瑾�(di脿o)鍒惰В瑾�(di脿o)銆佷俊閬撶法纰肩瓑鍔熻兘銆�
銆�銆�2. 闆烽仈绯荤当(t菕ng)涓�鐨勪俊铏熼噰闆嗚垏铏曠悊妯″��锛岃矤璨�鐩�妯欐�㈡��銆佽窡韫ゅ強鏁�(sh霉)鎿�(j霉)铻嶅悎銆�
銆�銆�3. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌�锛屼緥濡傝秴鑱叉尝鎴朇T鎺冩弿鍎�鐨勬暩(sh霉)鎿�(j霉)閲嶅缓绠楁硶纭�浠跺姞閫�銆�
銆�銆�4. 楂橀�熸暩(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛屽埄鐢ㄥ叾璞愬瘜鐨処/O璩囨簮鍜屽苟琛岃檿鐞嗚兘鍔涢�茶�屽�︽檪閲囨ǎ鑸囧垎鏋愩��
銆�銆�5. 瑕栭牷鍦栧儚铏曠悊闋�(l菒ng)鍩�锛屽寘鎷�閬嬪嫊妾㈡��銆侀倞绶ｅ�炲挤銆佽壊褰╂牎姝ｇ瓑鎿嶄綔銆�

XC5VSX50T-1FFG665C, XC5VSX50T-2FF665C, XC5VSX50T-3FF665C