鏅傞枔锛�2022/10/20 10:14:27
闁辫畝锛�584
鐢㈠搧鍨嬭櫉 | XC5VSX50T-1FFG1136I |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 480 I / O 1136FCBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鍒堕�犲晢 | Xilinx鍏徃 |
绯诲垪 | Virtex?-5SXT |
闆朵欢鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮 | 0.95V?1.05V |
宸ヤ綔婧害 | -40掳C?100掳C(TJ) |
鎵撳寘 | 鎵樼洡 |
鍖呰/绠� | 1136-BBGA锛孎(xi脿n)CBGA |
渚涙噳鍟嗚ō鍌欏寘瑁� | 1136-FCBGA(35x35) |
鍩烘湰闆朵欢铏� | XC5VSX50T |
鐢㈠搧鍨嬭櫉 | XC5VSX50T-1FFG1136I |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 480 I / O 1136FCBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鍒堕�犲晢 | Xilinx鍏徃 |
绯诲垪 | Virtex?-5SXT |
闆朵欢鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮 | 0.95V?1.05V |
宸ヤ綔婧害 | -40掳C?100掳C(TJ) |
鎵撳寘 | 鎵樼洡 |
鍖呰/绠� | 1136-BBGA锛孎(xi脿n)CBGA |
渚涙噳鍟嗚ō鍌欏寘瑁� | 1136-FCBGA(35x35) |
鍩烘湰闆朵欢铏� | XC5VSX50T |
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銆俈irtex-5LX锛氶珮鎬ц兘閫氱敤閭忚集鎳夌敤
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銆傛暩鎺ч樆鎶�(DCI)鏈夋簮绲傜
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銆傜鍚圥CI Express鍩烘湰瑕�(gu墨)鑼�1.1
銆傛瘡鍊嬪x1锛寈4鎴杧8閫氶亾鏀寔
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鈼忎笁妯�10/100/1000Mb/s浠ュお缍睲AC
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鈼廟ocketIOGTP鏀剁櫦(f膩)鍣�100Mb/s鑷�3.75Gb/s
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鈼廟ocketIOGTX鏀剁櫦(f膩)鍣�150Mb/s鑷�6.5Gb/s
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銆俁ISC鏋舵
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銆傚寘鎷�32KB鐨勬寚浠ゅ拰鏁告摎绶╁瓨
銆傚劒(y艒u)鍖栫殑铏曠悊鍣ㄦ帴鍙ｇ祼妲�(浜ゅ弶闁嬮棞)
鈼�65绱嶇背閵匔MOS宸ヨ棟鎶�琛�
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鈼忛珮淇¤櫉瀹屾暣鎬у�掕鑺墖灏佽锛屾彁渚涙婧栨垨鐒￠墰灏佽閬搁爡
鍒堕�犲晢鍖呰瑾槑 | 35 X 35 MM锛岀劇閴�锛孎(xi脿n)BGA-1136 |
绗﹀悎姝愮洘RoHS | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
鏈�澶ф檪閻橀牷鐜� | 1098.0鍏嗚但 |
JESD-30浠ｇ⒓ | S-PBGA-B1136 |
JESD-609浠ｇ⒓ | e1 |
绺絉AM浣� | 4866048 |
CLB鏁搁噺 | 4080.0 |
杓稿叆鏁搁噺 | 480.0 |
閭忚集鍠厓鏁� | 52224.0 |
杓稿嚭鏁搁噺 | 480.0 |
绔瓙鏁� | 1136 |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | BGA |
鍖呰绛夋晥浠ｇ⒓ | BGA1136,34X34,40 |
鍖呰褰㈢媭 | 鍥涙柟褰� |
鍖呰褰㈠紡 | 缍叉牸闄ｅ垪 |
宄板�煎洖娴佹韩搴�(鈩�) | 245 |
闆绘簮 | 1,2.5 |
搴ч珮 | 3.4姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲妯欑ū | 1.0浼� |
鏈�灏忎緵闆婚浕澹� | 0.95浼� |
鏈�澶ч浕婧愰浕澹� | 1.05浼� |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛� | CMOS |
绲傜瀹屾垚 | 閷�/閵�/閵�(Sn95.5Ag4.0Cu0.5) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴�-鏈�澶�(绉�) | 30 |
闀峰害 | 35.0姣背 |
瀵害 | 35.0姣背 |
