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鍣ㄤ欢绯诲垪锛歏irtex-5
銆�銆�灏佽椤炲瀷锛欶FG1136
銆�銆�I/O 鏁�(sh霉)閲忥細579
銆�銆�閰嶇疆妯″紡锛歋lave Serial, Master SelectMAP, Boundary Scan
銆�銆�閫熷害绛夌礆锛�-2
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�鍏�(n猫i)鏍搁浕澹擄細1.0V
銆�銆�IO 闆诲锛�1.8V/2.>宸ヨ棟绡�(ji茅)榛烇細65nm
銆�銆�FPGA 閭忚集鍠厓鏁�(sh霉)閲忥細50K
銆�銆�鏈�澶ч牷鐜囷細550 MHz
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銆�銆�瀹冮泦鎴愪簡澶氶仈 256 鍊嬮珮鎬ц兘 XtremeDSP 妯″锛岄�欎簺妯″鍖呮嫭 18x18 鐨勭‖浠朵箻娉曞櫒鍜� 48 浣嶇疮鍔犲櫒锛屽彲瀵︾従(xi脿n)蹇�熶笖楂樻晥鐨勬暩(sh霉)瀛椾俊铏熻檿鐞嗗姛鑳姐��
銆�銆�瑭茶姱鐗囬倓鎻愪緵楂橀仈 12.5 Gbps 鐨� RocketIO 鏀剁櫦(f膩)鍣�锛岀敤浜庢敮鎸侀珮閫熸暩(sh霉)鎿�(j霉)鍌宠几?sh霉)鑶筋�茶劆榧�?锛屼緥濡傚厜绾栭�氫俊鎴栬儗鏉块�ｆ帴銆�
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XC5VSX50T-2FFG1136C 鍙唬娉涙噳鐢ㄤ簬澶氬�嬮牁(l菒ng)鍩燂細
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XC5VSX50T-3FFG1136C
