鍨嬭櫉(h脿o)锛歑C6SLX16-2CPG196I
銆�銆�绯诲垪锛歋partan-6
銆�銆�鍝佺墝锛歑ilinx
銆�銆�灏佽�濋�炲瀷锛欳SBGA (Ceramic Solder Ball Grid Array)
銆�銆�寮曡叧鏁�(sh霉)锛�196
銆�銆�閫熷害绛夌礆(j铆)锛�-2
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細16384
銆�銆�閰嶇疆闁冨瓨锛氱劇(w煤)鍏�(n猫i)缃�闁冨��
銆�銆�RAM 璩囨簮锛�180KB
銆�銆�DSP Slice 鏁�(sh霉)閲忥細50
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +85掳C
銆�銆�I/O 閵�琛岄浕澹擄細1.2V/1.5V/1.8V/2.5V/3.3V

XC6SLX16-2CPG196I 鎻愪緵浜嗛潏娲荤殑鏋舵��(g貌u)瑷�(sh猫)瑷�(j矛)锛屽叿鏈変互涓嬩富瑕佺壒鎬э細
銆�銆�1. 闆欐牳 Block RAM 鍜� Distributed RAM 鏀�鎸侀珮鏁堢殑鏁�(sh霉)鎿�(j霉)瀛樺劜(ch菙)鑸囪檿鐞�銆�
銆�銆�2. 鍏�(n猫i)缃� DSP48A1 妯″��锛屾彁渚涚‖浠朵箻娉曞櫒鍜岀疮鍔犲櫒鍔熻兘锛岄仼鍚堜俊铏�(h脿o)铏曠悊鍜屾暩(sh霉)瀛�(xu茅)閬�(y霉n)绠椾换鍕�(w霉)銆�
銆�銆�3. 鏀�鎸佸�氱ó鎺ュ彛妯�(bi膩o)婧�(zh菙n)锛屽寘鎷� PCIe銆丏DR3銆丩VDS 绛�锛屽�炲��(qi谩ng)浜嗗�栭儴閫ｆ帴鑳藉姏銆�
銆�銆�4. 鐗规湁鐨� SelectIO 鎶�琛�(sh霉)鍏佽ū鐢ㄦ埗鏍规摎(j霉)瀵�(sh铆)闅涢渶姹傞厤缃�涓嶅悓鐨� I/O 灞�鎬�銆�
銆�銆�5. 閫氶亷(gu貌)楂樻晥鐨勬檪(sh铆)閻樼�＄悊妯″�婏紙Clock Management Tile, CMT锛夊��(sh铆)鐝�(xi脿n)绮剧⒑鐨勬檪(sh铆)閻樺垎鐧�(f膩)鍜岄牷鐜囪��(di脿o)鏁�銆�
銆�銆�6. 鏀�鎸侀儴鍒嗛噸閰嶇疆锛圥artial Reconfiguration锛�锛屽彲浠ュ湪閬�(y霉n)琛屾檪(sh铆)鍕�(d貌ng)鎱�(t脿i)鍔犺級涓嶅悓鐨勫姛鑳芥ā濉�锛屽緸鑰屽劒(y艒u)鍖栫郴绲�(t菕ng)璩囨簮鍒╃敤銆�
銆�銆�7. 鎻愪緵澶氱ó鍟熷嫊(d貌ng)妯″紡锛屽寘鎷�寰� SPI Flash銆丼D 鍗℃垨 PROM 閫�(j矛n)琛岄厤缃�鍔犺��銆�

XC6SLX16-2CPG196I 涓昏�佹��(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 娑堣不(f猫i)椤為浕瀛愮敘(ch菐n)鍝�锛屼緥濡傝�栭牷鐩�(ji膩n)鎺х郴绲�(t菕ng)銆佹暩(sh霉)瀛楅浕瑕�銆佹��(j墨)闋傜洅銆�
銆�銆�2. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栬ō(sh猫)鍌�锛屽�� PLC 鎺у埗鍣�銆侀亱(y霉n)鍕�(d貌ng)鎺у埗鍣ㄣ��
銆�銆�3. 閫氫俊鍩虹��(ch菙)瑷�(sh猫)鏂�锛屼緥濡傚熀绔�銆佽矾鐢卞櫒銆佷氦鎻涙��(j墨)涓�鐨勬��(sh霉)鎿�(j霉)鍖呰檿鐞嗘ā濉�銆�
銆�銆�4. 閱�(y墨)鐧傚剙鍣�锛屾瘮濡傝秴鑱叉尝瑷�(sh猫)鍌欍�佹偅鑰呯洠(ji膩n)璀�(h霉)鍎�銆�
銆�銆�5. 姹借粖(ch膿)闆诲瓙绯荤当(t菕ng)锛岀敤浜� ADAS锛堥珮绱�(j铆)椐曢�涜紨鍔╃郴绲�(t菕ng)锛夈�佽粖(ch膿)杓変俊鎭�濞涙��(l猫)绛�銆�
銆�銆�6. 鐗╄伅(li谩n)缍�(w菐ng)锛圛oT锛夌恫(w菐ng)闂�(gu膩n)鍜岄倞绶ｈ▓(j矛)绠楄ō(sh猫)鍌�锛屼互鏀�鎸佹湰鍦�?c谩i)?sh霉)鎿�(j霉)閲囬泦鍜岄爯(y霉)铏曠悊銆�

XC6SLX16-2FTG256I
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