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鍟嗗搧鍒嗛 | FPGA鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 | I/O鏁�(sh霉) | 190 |
鍝佺墝 | XILINX(璩介潏鎬�) | 闆诲-渚涢浕 | 1.14V ~ 1.26V |
灏佽 | 324-CSPBGA锛�15x15锛� | 瀹夎椤炲瀷 | 琛ㄩ潰璨艰鍨� |
鍟嗗搧妯欑敖 | 宸ユキ(y猫)绱� | 宸ヤ綔婧害 | 0掳C ~ 85掳C锛圱J锛� |
閭忚集鍏冧欢/鍠厓鏁�(sh霉) | 24051 | 鍩烘湰鐢�(ch菐n)鍝佺法铏� | XC6SLX25 |
绺�RAM浣嶆暩(sh霉) | 958464 |
|
RoHS鐙�鎱�(t脿i) | 绗﹀悎 ROHS3 瑕�(gu墨)鑼� | HTSUS | 8542.39.0001 |
婵曟埃鏁忔劅鎬х瓑绱�(MSL) | 3锛�168 灏忔檪锛� | LAB/CLB鏁�(sh霉) | 1879 |
ECCN | EAR99 | REACH鐙�鎱�(t脿i) | 闈� REACH 鐢�(ch菐n)鍝� |
XC6SLX25T-2CSG324C寮曡叧鍦�
XC6SLX25T-2CSG324C灏佽
XC6SLX25T-2CSG324C绲插嵃
