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XC6SLX25T-4CSG324C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Spartan-6 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏�銆係partan-6 绯诲垪浠ュ叾楂樻�ц兘銆佷綆鍔熻�楀拰浣庢垚鏈憲绋�锛屽唬娉涙噳鐢ㄤ簬娑堣不闆诲瓙銆佸伐妤�(y猫)鎺у埗銆侀�氫俊瑷倷绛夐牁鍩熴�傝┎鑺墖閲囩敤 45nm 宸ヨ棟鍒堕��锛屽叿鏈夎睈瀵岀殑閭忚集璩囨簮鍜� I/O 閰嶇疆锛岄仼鍚堝绋京闆滄暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�XC6SLX25T 灞簬 Spartan-6 LX 绯诲垪锛屼富瑕侀嚌灏嶄綆瀵嗗害鎳夌敤瑷▓锛屾彁渚涗簡闈堟椿鐨勬檪閻樼鐞嗗柈鍏冨拰宓屽叆寮忓瓨鍎插櫒濉�锛岃兘澶犳豢瓒冲绋噳鐢ㄥ牬鏅殑闇�姹�銆�
鍨嬭櫉锛歑C6SLX25T-4CSG324C
銆�銆�绯诲垪锛歋partan-6
銆�銆�閫熷害绛夌礆锛�-4
銆�銆�灏佽褰㈠紡锛欳SG324
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細25,120
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)缃杻瀛�
銆�銆�鐢ㄦ埗I/O寮曡叧鏁�(sh霉)锛�228
銆�銆�RAM瀹归噺锛�186 Kb
銆�銆�DSP Slice鏁�(sh霉)閲忥細40
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�宸ヨ棟绡�(ji茅)榛烇細45 nm
銆�銆�闆绘簮闆诲锛�1.2V 鏍稿績锛�1.5V 鎴� 1.8V I/O
XC6SLX25T-4CSG324C 鎻愪緵浜嗛珮搴﹂泦鎴愬寲鐨勭‖浠舵灦妲�锛屽叾涓昏鐗规�у寘鎷細
銆�銆�1. 楂樻�ц兘閭忚集绲愭锛屾敮鎸佸京闆滅殑鏁�(sh霉)瀛楅浕璺ō瑷�銆�
銆�銆�2. 宓屽叆寮� Block RAM 鍜屽垎甯冨紡 RAM 绲愭锛屾彁渚涢潏娲荤殑瀛樺劜瑙ｆ焙鏂规銆�
銆�銆�3. 鍏�(n猫i)缃� DSP Slice锛屽彲瀵︾従(xi脿n)楂樻晥鐨勬暩(sh霉)瀛椾俊铏熻檿鐞嗗姛鑳姐��
銆�銆�4. 鍙法绋� I/O 妯欐簴鏀寔锛岄仼閰嶅绋閮ㄦ帴鍙ｉ渶姹傘��
銆�銆�5. 鏀寔 SelectMAP銆丮aster SPI 鍜� Slave Serial 澶氱ó閰嶇疆妯″紡锛屼究浜庣郴绲�(t菕ng)闆嗘垚銆�
銆�銆�6. 闆嗘垚 DCM锛堟暩(sh霉)瀛楁檪閻樼鐞嗗櫒锛夊拰 PLL锛堥帠鐩哥挵(hu谩n)锛�锛岀偤鐢ㄦ埗鎻愪緵绮剧⒑鐨勬檪閻樼鐞嗗拰闋荤巼鍚堟垚鍔熻兘銆�
銆�銆�7. 鎻愪緵闈堟椿鐨勪綆鍔熻�楁ā寮忛伕鎿�锛岄仼鐢ㄤ簬灏嶅姛鑰楁晱鎰熺殑鎳夌敤鍫存櫙銆�
銆�銆�8. 鏀寔閮ㄥ垎閲嶆柊閰嶇疆鎶�琛�锛屽厑瑷卞湪閬嬭鏈熼枔鍕曟厠(t脿i)鏇存柊閮ㄥ垎閭忚集鍔熻兘銆�
銆�銆�9. 鎻愪緵寮峰ぇ鐨勯枊鐧�(f膩)宸ュ叿閺堟敮鎸�锛屽 Xilinx ISE Design Suite 鍜� Vivado 瑷▓濂椾欢銆�
XC6SLX25T-4CSG324C 鍦ㄥ鍊嬮牁鍩熶腑鏈夎憲寤ｆ硾鐨勬噳鐢�锛屽叿楂斿寘鎷細
銆�銆�1. 娑堣不椤為浕瀛愮敘(ch菐n)鍝侊細濡傞珮娓呰闋昏檿鐞�銆佸湒鍍忚瓨鍒ュ拰闊抽牷绶ㄨВ纰肩瓑銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栵細鐢ㄤ簬鏁�(sh霉)鎿�(j霉)閲囬泦銆侀亱鍕曟帶鍒跺拰瀵︽檪閫氫俊鍗�(xi茅)璀板鐝�(xi脿n)銆�
銆�銆�3. 閫氫俊瑷倷锛氫緥濡傚熀甯朵俊铏熻檿鐞�銆佺恫(w菐ng)绲′氦鎻涘拰璺敱鍔熻兘瀵︾従(xi脿n)銆�
銆�銆�4. 閱�(y墨)鐧傝ō鍌欙細鐢ㄤ簬閱�(y墨)鐧傚奖鍍忚檿鐞�銆佹偅鑰呯洠(ji膩n)璀风郴绲�(t菕ng)鍜屽叾浠栬ê鏂峰剙鍣�銆�
銆�銆�5. 姹借粖闆诲瓙锛氭敮鎸佽粖杓変俊鎭妯傜郴绲�(t菕ng)銆侀珮绱氶椐涜紨鍔╃郴绲�(t菕ng)绛夊姛鑳�銆�
銆�銆�6. 绉戝鐮旂┒鑸囨脯瑭︽脯閲忥細鎻愪緵楂橀�熸暩(sh霉)鎿�(j霉)閲囬泦銆佷俊铏熺敓鎴愬拰绠楁硶鍔犻�熷姛鑳�銆�
XC6SLX25T-3CSG324C
銆�銆�XC6SLX25T-2CSG324C
