鍨嬭櫉锛歑C6SLX45-2FGG676C
銆�銆�绯诲垪锛歋partan-6
銆�銆�瀹舵棌锛歀X
銆�銆�FPGA 閭忚集鍠�鍏冩��(sh霉)閲忥細绱� 45,000 鍊� CLB锛圫lice锛�
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銆�銆�RAM 璩囨簮锛�54Kb Block RAM 绺介噺鐐� 2.1Mb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細180 鍊�
銆�銆�I/O 鏁�(sh霉)閲忥細鏈�澶� 392 鍊嬬敤鎴� I/O
銆�銆�宸ヤ綔闆诲�擄細鏍稿績闆诲�� 1.2V锛孖/O 闆诲�撴牴鎿�(j霉)妯�(bi膩o)婧�(zh菙n)鍙�瑾�(di脿o)
銆�銆�灏佽�濋�炲瀷锛欶GG676 (Flip-Chip Gull Wing, 676 寮曡叧)
銆�銆�閫熷害绛夌礆锛�-2
銆�銆�宸ヨ棟绡�(ji茅)榛烇細45nm
銆�銆�婧�搴﹁寖鍦嶏細鍟嗘��(y猫)绱氾紙0掳C 鑷� 85掳C锛�

XC6SLX45-2FGG676C 鎻愪緵浜嗕互涓嬮’钁楃壒鎬э細
銆�銆�1. 楂樺害闈堟椿鐨勬灦妲�(g貌u)锛歋partan-6 FPGA 鐨� CLB锛圕onfigurable Logic Block锛夊熀浜庡叐鍊嬪叚杓稿叆鏌ユ壘琛�锛圠UT6锛夛紝鎻愪緵浜嗗挤澶х殑閭忚集鍔熻兘鍜屽劒(y艒u)鍖栫殑鎬ц兘銆�
銆�銆�2. 鍏�(n猫i)缃� DSP Slice锛氭瘡鍊� DSP Slice 鍖呭惈涓�鍊� 25x18 浣嶄箻娉曞櫒鍜� 48 浣嶇疮鍔犲櫒锛岄潪甯搁仼鍚堟暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�(w霉)锛屽�傛烤娉㈠櫒瀵︾��(xi脿n)銆丗FT 瑷堢畻绛夈��
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銆�銆�4. 澶氱ó I/O 妯�(bi膩o)婧�(zh菙n)鏀�鎸侊細鍏煎�� LVCMOS銆丩VDS銆丳CI 绛夊�氱ó鎺ュ彛鍗�(xi茅)璀帮紝渚夸簬鑸囧�栭儴瑷�(sh猫)鍌欓��(j矛n)琛岄珮鏁堥�氫俊銆�
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銆�銆�6. 鍏�(n猫i)閮ㄩ厤缃�閭忚集锛氶�氶亷 SelectMAP銆丼lave Serial銆丮aster Serial 绛夊�氱ó鏂瑰紡鍔犺級閰嶇疆鏁�(sh霉)鎿�(j霉)锛屾敮鎸佹帀闆诲悗閲嶆柊閰嶇疆銆�
銆�銆�7. 浣庡姛鑰楄ō(sh猫)瑷堬細閲囩敤 PowerTune 鎶�琛�(sh霉)锛屽湪淇濊瓑鎬ц兘鐨勫悓鏅傛湁鏁堥檷浣庡嫊鎱�(t脿i)鍔熻�椼��

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銆�銆�1. 宓屽叆寮忕郴绲�(t菕ng)锛氱敤浜庡�︾��(xi脿n)寰�(f霉)闆滅殑宓屽叆寮忔帶鍒堕倧杓�锛屼緥濡傚伐妤�(y猫)鑷�鍕曞寲鎺у埗鍣ㄦ垨閱�(y墨)鐧傝ō(sh猫)鍌欎腑鐨勪俊铏熻檿鐞�銆�
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XC6SLX45-3FGG676C
銆�銆�XC6SLX45T-2FGG676C
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