鏅傞枔锛�2025/5/7 23:36:00
闁辫畝锛�30
XC6SLX75-N3CSG484I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Spartan-6 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏熴�係partan-6 绯诲垪灞簬浣庢垚鏈�銆佷綆鍔熻�楃殑 FPGA锛屼富瑕侀潰鍚戦�氫俊銆佸伐妤�(y猫)鎺у埗銆佹秷璨婚浕瀛愬拰閱�(y墨)鐧傝ō鍌欑瓑闋樺煙銆俋C6SLX75-N3CSG484I 鍏锋湁杓冮珮鐨勯倧杓硣婧愬瘑搴﹀拰璞愬瘜鐨� I/O 鎺ュ彛閰嶇疆锛屽悓鏅傛敮鎸佸绋祵鍏ュ紡瀛樺劜鍣ㄥ拰 DSP 妯″锛岃兘澶犳豢瓒充腑绛夊京闆滃害鐨勮ō瑷堥渶姹�銆�
銆�銆�瑭茶姱鐗囬噰鐢� 484 寮曡叧鐨� CSG锛圕eramic Column Grid Array锛夊皝瑁濆舰寮�锛岄仼鍚堝皪鍙潬鎬ц姹傝純楂樼殑鎳夌敤鍫存櫙銆�
鍨嬭櫉锛歑C6SLX75-N3CSG484I
銆�銆�绯诲垪锛歋partan-6
銆�銆�鍝佺墝锛歑ilinx
銆�銆�灏佽椤炲瀷锛欳SG (Ceramic Column Grid Array)
銆�銆�寮曡叧鏁�(sh霉)锛�484
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細75K
銆�銆�RAM 绺介噺锛�1140 Kb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細120
銆�銆�閰嶇疆妯″紡锛歋lave Serial, Master SelectMAP, Slave BPI
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�I/O 閵�琛岄浕澹擄細1.2V/1.5V/1.8V/2.5V/3.3V
銆�銆�鍏�(n猫i)鏍搁浕澹擄細1.2V
XC6SLX75-N3CSG484I 鎻愪緵浜嗚睈瀵岀殑鍙法绋嬮倧杓硣婧愬拰闈堟椿鐨� I/O 閰嶇疆鑳藉姏锛岄仼鐢ㄤ簬澶氱ó宓屽叆寮忕郴绲�(t菕ng)瑷▓銆傚叾涓昏鐗规�у寘鎷細
銆�銆�1. 鍏�(n猫i)閮ㄩ泦鎴愪簡 75K 鐨勯倧杓柈鍏冿紙CLB锛夛紝鑳藉?q奴)宕縁(xi脿n)寰╅洔鐨勬暩(sh霉)瀛楅倧杓姛鑳�銆�
銆�銆�2. 鏀寔澶氶仈 120 鍊� DSP Slice锛岄仼鍚堥�茶楂樻�ц兘鏁�(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�3. 鍏�(n猫i)宓� 1140 Kb 鐨� Block RAM锛屽彲浠ヤ綔鐐烘暩(sh霉)鎿�(j霉)绶╂矕鍗�(q奴)鎴栧瓨鍎茬敤鎴剁▼搴�銆�
銆�銆�4. 鎻愪緵澶氶仈 484 鍊嬪紩鑵�锛屽叿鏈夐珮搴﹂潏娲荤殑 I/O 鎺ュ彛閰嶇疆鑳藉姏锛屾敮鎸佸绋浕澹撴婧�銆�
銆�銆�5. 鏀寔澶氱ó閰嶇疆妯″紡锛屽寘鎷� Slave Serial銆丮aster SelectMAP 鍜� Slave BPI 绛�锛屼究浜庤垏澶栭儴鎺у埗鍣ㄦ垨鍏朵粬鍣ㄤ欢閫ｆ帴銆�
銆�銆�6. 宸ヤ綔婧害鑼冨湇瀵唬锛岃兘澶犲湪 -40掳C 鑷� +100掳C 鐨勭挵(hu谩n)澧冧笅姝ｅ父閬嬭锛岄仼鍚堝伐妤�(y猫)绱氭噳鐢ㄣ��
銆�銆�7. 浣跨敤 CSG 灏佽锛屽叿鍌欏嚭鑹茬殑鏁ｇ啽鎬ц兘鍜岄珮鍙潬鎬�锛岄仼鐢ㄤ簬灏嶇挵(hu谩n)澧冮仼鎳夋�ц姹傝純楂樼殑鍫村悎銆�
XC6SLX75-N3CSG484I 鑺墖閬╃敤浜庝互涓嬪吀鍨嬫噳鐢ㄩ牁鍩燂細
銆�銆�1. 鏁�(sh霉)鎿�(j霉)閫氫俊鍜岀恫(w菐ng)绲¤ō鍌欙細濡備氦鎻涙銆佽矾鐢卞櫒銆佺恫(w菐ng)闂滅瓑銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栨帶鍒讹細鐢ㄤ簬瀵︽檪鎺у埗鍜屾暩(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)銆�
銆�銆�3. 宓屽叆寮忚瑕虹郴绲�(t菕ng)锛氬瀹夐槻鏀濆儚闋�銆佹鍣ㄨ瑕鸿ō鍌�銆�
銆�銆�4. 閱�(y墨)鐧傝ō鍌欙細濡傝秴鑱叉尝鎴愬儚鍎�銆佺洠(ji膩n)璀峰剙绛夈��
銆�銆�5. 娑堣不椤為浕瀛愮敘(ch菐n)鍝侊細濡傞珮绔’绀烘帶鍒跺櫒鍜岄煶闋昏檿鐞嗗櫒銆�
銆�銆�6. 娓│娓噺鍎�鍣細濡傜ず娉㈠櫒銆佷俊铏熺櫦(f膩)鐢熷櫒绛�銆�
銆�銆�鎲戝�熷叾寮峰ぇ鐨勯倧杓硣婧愬拰闈堟椿鐨勬帴鍙ｉ厤缃兘鍔涳紝瑭茶姱鐗囬潪甯搁仼鍚堥渶瑕佽純楂樿▓绠楄兘鍔涘拰澶氭帴鍙ｆ摯灞曠殑鎳夌敤鍫存櫙銆�
XC6SLX75T-CSG484I
銆�銆�XC6SLX75C-CSG484C
