XC6VHX380T-1FFG1155I 鏅傞枔锛�2025/5/7 14:04:28 闁辫畝锛�27

XC6VHX380T-1FFG1155I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-6 绯诲垪 FPGA 鑺墖涓殑涓€鍊嬪瀷铏�銆傝┎绯诲垪鑺墖閲囩敤 40nm 宸ヨ棟鍒堕€�锛屽皥鐐洪珮鎬ц兘鍜岄珮閭忚集瀵嗗害鐨勬噳(y墨ng)鐢ㄥ牬鏅ō(sh猫)瑷堛€俋C6VHX380T 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆佹暩(sh霉)瀛椾俊铏熻檿鐞� (DSP) 妯″浠ュ強宓屽叆寮忓瓨鍎插櫒濉�锛屾敮鎸佸京(f霉)闆滅殑纭欢鍔犻€熷拰绯荤当(t菕ng)闆嗘垚銆�
銆€銆€姝ゅ瀷铏熺殑 XC6VHX380T 鍖呭惈绱� 380K 鍊嬮倧杓柈鍏�锛屽苟鍏峰倷澶氱ó楂樻€ц兘鎺ュ彛閬搁爡锛屼緥濡� PCIe銆佸崈鍏嗕互澶恫(w菐ng) MAC 鍜� RocketIO 鏀剁櫦(f膩)鍣ㄧ瓑锛岄仼鍚堢敤浜庨€氫俊銆佸湒鍍忚檿鐞�銆佸伐妤�(y猫)鎺у埗鍜屽叾浠栭渶瑕佸ぇ瑕�(gu墨)妯″苟琛岃▓绠楄兘鍔涚殑闋�(l菒ng)鍩熴€�

鍙冩暩(sh霉)

鍨嬭櫉锛歑C6VHX380T-1FFG1155I
銆€銆€绯诲垪锛歏irtex-6
銆€銆€宸ヨ棟锛�40nm
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細380K
銆€銆€閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)缃�
銆€銆€I/O 鏁�(sh霉)閲忥細鏈€澶ф敮鎸� 744 鍊嬬敤鎴� I/O
銆€銆€瀛樺劜鍣細澶氶仈 21.5Mb 宓屽叆寮忓 RAM
銆€銆€DSP Slice锛�960 鍊�
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆€銆€灏佽椤炲瀷锛欶FG1155
銆€銆€鏅傞悩闋荤巼锛氭渶楂樻敮鎸佽秴閬� 550MHz 鐨勬牳蹇冩檪閻�
銆€銆€闆绘簮闆诲锛�1.0V 鏍搁浕澹�锛�3.3V/2.5V/1.8V I/O 闆诲

鐗规€�

XC6VHX380T-1FFG1155I 鎻愪緵浜嗗挤澶х殑閭忚集璩囨簮鍜岄潏娲荤殑浜掗€ｆ灦妲�(g貌u)锛屾敮鎸佸嫊鎱�(t脿i)鍙噸妲�(g貌u)鎶€琛�(sh霉)锛屽厑瑷辩敤鎴跺湪閬嬭鏅傞噸鏂伴厤缃儴鍒嗛倧杓浕璺�銆傚畠閭勯泦鎴愪簡澶氬€嬬‖鏍� IP 妯″锛屽寘鎷� PCIe Gen2 x8 姗嬫帴鍣ㄣ€佸崈鍏嗕互澶恫(w菐ng) MAC 鍜岄珮绱氬姞瀵嗘(bi膩o)婧�(zh菙n) (AES) 鍔犲瘑妯″绛�銆�
銆€銆€姝ゅ锛孯ocketIO 楂橀€熶覆琛屾敹鐧�(f膩)鍣ㄨ兘澶�?q奴)宕縁(xi脿n)楂橀仈 6.5Gbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼锛岄仼鐢ㄤ簬鍏夌簴閫氫俊鍜岃儗鏉夸簰閫ｆ噳(y墨ng)鐢�銆傚叾浣庡姛鑰楃壒鎬у拰楂樺害鍙摯灞曟€т娇鍏舵垚鐐鸿埅绌鸿埅澶�銆佸湅闃�銆侀啱(y墨)鐧傛垚鍍忓強楂樼娓│瑷�(sh猫)鍌欑殑鐞嗘兂閬告搰銆�
銆€銆€闁嬬櫦(f膩)宸ュ叿鏂归潰锛孹ilinx 鎻愪緵浜� Vivado Design Suite 鍜� ISE Design Suite 绛夊畬鏁寸殑杌熺‖浠跺崝(xi茅)鍚岄枊鐧�(f膩)鐠�(hu谩n)澧�锛岀啊鍖栦簡寰炶ō(sh猫)瑷堝埌瀵︾従(xi脿n)鐨勯亷绋嬨€�

鎳�(y墨ng)鐢�

瑭� FPGA 鍨嬭櫉寤ｆ硾鎳�(y墨ng)鐢ㄤ簬鍚勭ó楂樻€ц兘瑷堢畻鍜屽京(f霉)闆滅郴绲�(t菕ng)闆嗘垚闋�(l菒ng)鍩燂細
銆€銆€- 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤細濡傚熀绔欒檿鐞�銆佽矾鐢卞櫒鍜屼氦鎻涙涓殑鏁�(sh霉)鎿�(j霉)鍖呰檿鐞�
銆€銆€- 瑕栭牷鑸囧湒鍍忚檿鐞嗭細瀵︾従(xi脿n)瀵︽檪瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佽▓绠楁瑕栬绠楁硶鍔犻€�
銆€銆€- 宸ユキ(y猫)鑷嫊鍖栵細閬嬪嫊鎺у埗銆佹鍣ㄤ汉瀛�(xu茅)涓殑瀵︽檪鏁�(sh霉)鎿�(j霉)閲囬泦鑸囪檿鐞�
銆€銆€- 閱�(y墨)鐧傝ō(sh猫)鍌欙細瓒呰伈娉㈡垚鍍忋€佹牳纾佸叡鎸巸鎻忓剙涓殑淇¤櫉铏曠悊
銆€銆€- 娓│娓噺锛欰TE锛堣嚜鍕曟脯瑭﹁ō(sh猫)鍌欙級鍜岀ず娉㈠櫒涓珮閫熸暩(sh霉)鎿�(j霉)閲囬泦
銆€銆€- 杌嶄簨鑸囪埅澶╋細闆烽仈淇¤櫉铏曠悊銆佽(w猫i)鏄熼€氫俊涓殑鏁�(sh霉)鎿�(j霉)閺堣矾绠＄悊