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XC6VHX380T-2FF1923CES9945 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-6 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏熴�傝┎绯诲垪鑺墖寤ｆ硾鎳夌敤浜庨珮鎬ц兘瑷堢畻銆侀�氫俊绯荤当(t菕ng)銆佸湒鍍忚檿鐞嗗拰宸ユキ(y猫)鎺у埗绛夐牁鍩�銆俈irtex-6 FPGA 閲囩敤 40nm 鍒剁▼宸ヨ棟锛屽叿鏈夐珮閭忚集瀵嗗害銆佽睈瀵岀殑 DSP 妯″鍜岄珮閫熶覆琛屾敹鐧�(f膩)鍣�锛岃兘澶犳豢瓒冲京闆滆ō瑷堢殑闇�姹�銆�
銆�銆�Virtex-6 绯诲垪鍖呭惈澶氬�嬪瓙绯诲垪锛孹C6VHX380T 灞簬 HX 瀛愮郴鍒�锛屽皥娉ㄤ簬楂樻�ц兘瑷堢畻鍜屼俊铏熻檿鐞嗕换鍕�銆侶X 绯诲垪鍦ㄦ�ц兘鍜岃硣婧愬埄鐢ㄧ巼涓婅〃鐝剧獊鍑�锛屽悓鏅傛敮鎸佸绋帴鍙ｆ婧栧拰鍗旇銆�
鍨嬭櫉锛歑C6VHX380T-2FF1923CES9945
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛歏irtex-6 HX
銆�銆�鍒剁▼宸ヨ棟锛�40nm
銆�銆�閭忚集鍠厓鏁搁噺锛�380,000
銆�銆�DSP Slice 鏁搁噺锛�1,152
銆�銆�Block RAM 瀹归噺锛氱磩 17.3 Mb
銆�銆�閰嶇疆闁冨瓨锛氫笉鍏х疆
銆�銆�I/O 寮曡叧鏁革細1,923
銆�銆�灏佽椤炲瀷锛欶FG1923
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹� 1.0V锛岃紨鍔╅浕澹� 2.5V/3.3V
XC6VHX380T-2FF1923CES9945 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘閭忚集绲愭锛屾敮鎸佸京闆滅殑鏁稿瓧淇¤櫉铏曠悊鍜屾暩鎿氳矾寰戝劒(y艒u)鍖�銆�
銆�銆�2. 鍏х疆澶ч噺 DSP Slice锛岄仼鐢ㄤ簬鐭╅櫍閬嬬畻銆丗FT 鍜屾烤娉㈢瓑楂樻�ц兘瑷堢畻浠诲嫏銆�
銆�銆�3. 鎻愪緵楂橀�熶覆琛屾敹鐧�(f膩)鍣紙GTX锛�锛屾敮鎸侀�熺巼楂橀仈 6.5 Gbps锛屽彲鍏煎澶氱ó閫氫俊鍗旇濡� PCI Express銆丼ATA 鍜屽崈鍏嗕互澶恫銆�
銆�銆�4. 鏀寔鍒嗗竷寮忓瓨鍎插櫒鍜� Block RAM锛岄仼鍚堥渶瑕佸ぇ瀹归噺瀛樺劜鐨勬噳鐢ㄥ牬鏅�銆�
銆�銆�5. 宓屽叆寮忕‖浠跺姞瀵嗘ā濉�锛岀⒑淇� IP 鏍稿拰閰嶇疆鏁告摎鐨勫畨鍏ㄦ��銆�
銆�銆�6. 澶氱ó鏅傞悩绠＄悊閬搁爡锛屽寘鎷� PLL 鍜� DCM 妯″锛屾彁渚涚簿纰虹殑鏅傞悩鍒嗛厤鍜岀浉浣嶈鏁村姛鑳�銆�
銆�銆�7. 鏀寔閮ㄥ垎閲嶉厤缃妧琛�锛屽厑瑷卞湪閬嬭鏅傚嫊鎱�(t脿i)鏇存柊閮ㄥ垎閭忚集鍔熻兘锛屾彁楂橀潏娲绘�у拰璩囨簮鍒╃敤鐜�銆�
銆�銆�8. 寤ｆ硾鐨� I/O 妯欐簴鏀寔锛屽寘鎷� LVDS銆丠STL 鍜� SSTL 绛夛紝婊胯冻涓嶅悓鎳夌敤鍫存櫙鐨勯渶姹�銆�
XC6VHX380T-2FF1923CES9945 涓昏鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊瑷倷锛氬鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙涓殑淇¤櫉铏曠悊鍜屽崝璀拌綁鎻�銆�
銆�銆�2. 楂樻�ц兘瑷堢畻锛氱敤浜庣瀛歌▓绠�銆侀噾铻嶅缓妯″拰姗熷櫒瀛哥繏鍔犻�熴��
銆�銆�3. 鍦栧儚鑸囪闋昏檿鐞嗭細鍖呮嫭瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佸鏅傚湒鍍忓垎鏋愬拰澧炲挤鐝惧銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栵細瀵︾従閬嬪嫊鎺у埗銆佸偝鎰熷櫒铻嶅悎鍜岄爯娓�х董璀枫��
銆�銆�5. 閱�(y墨)鐧傝ō鍌欙細濡傝秴鑱叉尝鎴愬儚銆丆T 鎺冩弿鍜屽鏅傛暩鎿氬垎鏋�銆�
銆�銆�6. 鑸┖鑸ぉ鑸囧湅闃诧細闆烽仈淇¤櫉铏曠悊銆佽(w猫i)鏄熼�氫俊鍜屽皫鑸郴绲�(t菕ng)銆�
XC6VHX380T-2FFG1755C, XC6VHX380T-3FFG1755C, XC6VHX380T-2FFG1156C
