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闁辫畝锛�35
XC6VLX240T-L1FFG784C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-6 绯诲垪 FPGA 鑺墖涓殑涓�娆俱�傝┎绯诲垪鑺墖灏堢偤楂樻�ц兘銆佷綆鍔熻�楁噳鐢ㄨ�岃ō瑷�锛岄仼鐢ㄤ簬閫氫俊銆佷俊铏熻檿鐞嗐�佸湒鍍忚檿鐞�銆佸伐妤�(y猫)鎺у埗绛夊京闆滅郴绲�(t菕ng)銆�
銆�銆�姝ゅ瀷铏熺殑 XC6VLX240T 灞簬楂樼鐢�(ch菐n)鍝佺窔锛屽叿鏈夊ぇ瀹归噺閭忚集璩囨簮鍜岃睈瀵岀殑澶栬ō鎺ュ彛锛岃兘澶犳豢瓒冲绋京闆滆▓绠楅渶姹�銆�
绯诲垪锛歏irtex-6
銆�銆�鍨嬭櫉锛歑C6VLX240T-L1FFG784C
銆�銆�灏佽锛欶FG784
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 240,000
銆�銆�閰嶇疆瀛樺劜鍣ㄩ鍨嬶細Flash/SRAM
銆�銆�宸ヤ綔婧害鑼冨湇锛氬伐妤�(y猫)绱氾紙-40掳C 鑷� +100掳C锛�
銆�銆�鍏ф牳闆诲锛�1.0V
銆�銆�I/O 闆诲锛�1.8V/2.5V/3.3V
銆�銆�鏈�澶ф檪閻橀牷鐜囷細瓒呴亷 500 MHz
銆�銆�DSP Slice 鏁�(sh霉)閲忥細1920
銆�銆�Block RAM 鏁�(sh霉)閲忥細绱� 14MB
銆�銆�鍏ч儴 Flash 瀹归噺锛氱劇
銆�銆�寮曡叧鏁�(sh霉)锛�784
XC6VLX240T-L1FFG784C 鎻愪緵浜嗛潪甯稿挤澶х殑鎬ц兘鍜岄潏娲绘��銆�
銆�銆�1. 楂樺瘑搴﹂倧杓硣婧愶細鎿佹湁绱� 240,000 鍊嬮倧杓柈鍏�锛岄仼鍚堝鐝�(xi脿n)寰╅洔鐨勬暩(sh霉)瀛楅浕璺�銆�
銆�銆�2. 澶氱ó宓屽叆寮忕‖鏍告ā濉婏細鍖呮嫭 PCIe銆佸崈鍏嗕互澶恫(w菐ng) MAC 鍜屽姞瀵嗘ā濉婄瓑锛岀啊鍖栫郴绲�(t菕ng)闁嬬櫦(f膩)銆�
銆�銆�3. 璞愬瘜鐨� DSP 鏀寔锛氶厤鍌欏閬� 1920 鍊� DSP Slice锛屽彲鍔犻�熸诞榛為亱绠楀拰鐭╅櫍涔樻硶绛変换鍕�銆�
銆�銆�4. 楂橀�熶覆琛屾敹鐧�(f膩)鍣細鏀寔楂橀仈 6.5 Gbps 鐨勯�熺巼锛岄仼鐢ㄤ簬楂橀�熸暩(sh霉)鎿�(j霉)鍌宠几鍫存櫙銆�
銆�銆�5. 鍔熻�楀劒(y艒u)鍖栨妧琛擄細閫氶亷鍕曟厠(t脿i)闆绘簮. 鍙摯灞曟�у挤锛氭敮鎸佸椤� FPGA 鑱�(li谩n)鍚堜娇鐢�锛屾寤鸿秴澶ц(gu墨)妯＄郴绲�(t菕ng)銆�
銆�銆�7. 鍏х疆 Block RAM锛氭彁渚涚磩 14MB 鐨勫瓨鍎茬┖闁�锛屽彲鐢ㄤ簬绶╁瓨鎴栨煡鎵捐〃绛夊姛鑳姐��
銆�銆�姝ゅ锛岃┎鑺墖鍏煎澶氱ó閰嶇疆妯″紡锛屽 JTAG銆丼electMAP 鍜� Master/Slave SPI锛屼究浜庣敓鐢�(ch菐n)鑸囪瑭�銆�
鐢变簬鍏堕珮鎬ц兘鍜岄潏娲绘�э紝XC6VLX240T-L1FFG784C 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊瑷倷锛氬鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙涓殑淇¤櫉铏曠悊鍠厓銆�
銆�銆�2. 閱�(y墨)鐧傚奖鍍忥細鐢ㄤ簬瀵︽檪鍦栧儚铏曠悊鍜岃ê鏂峰垎鏋�銆�
銆�銆�3. 宸ユキ(y猫)鑷嫊鍖栵細鍩�(zh铆)琛屽京闆滅殑閬嬪嫊鎺у埗绠楁硶銆�
銆�銆�4. 瑕栭牷寤ｆ挱锛氭敮鎸侀珮鍒嗚鲸鐜囪闋荤法纰艰В纰煎強娴佸獟楂斿偝杓�銆�
銆�銆�5. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浣滃崝(xi茅)铏曠悊鍣ㄤ締鍔犻�熺壒瀹氫换鍕�銆�
銆�銆�6. 杌嶄簨鑸囪埅澶╋細鍥犲叾鍙潬鎬э紝甯歌鐢ㄤ簬鍦嬮槻闋呯洰涓殑闂滈嵉绲勪欢銆�
銆�銆�7. 姹借粖闆诲瓙锛氭秹鍙婇珮绱氶椐涜紨鍔╃郴绲�(t菕ng) (ADAS) 鐨勬暩(sh霉)鎿�(j霉)铻嶅悎閮ㄥ垎銆�
銆�銆�绺戒箣锛屼换浣曢渶瑕佸ぇ閲忓苟琛岃▓绠楁垨蹇�熸暩(sh霉)鎿�(j霉)鍚炲悙鐨勬噳鐢ㄩ兘鍙互鑰冩叜閲囩敤閫欐 FPGA銆�
XC6VLX240T-1FFG784I
銆�銆�XC6VLX240T-2FFG784C
銆�銆�XC6VLX240T-3FFG784C
