鍨嬭櫉(h脿o)锛歑C6VLX550T-L1FFG1759C
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛歏irtex-6
銆�銆�灏佽�濓細FFG1759
銆�銆�閫熷害绛夌礆(j铆)锛歀1
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細550,000
銆�銆�RAM 瀹归噺锛�23.8 Mb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細1,140
銆�銆�閰嶇疆妯″紡锛歋electMAP銆丮aster/Slave Serial銆丅PI
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C
銆�銆�I/O 寮曡叧鏁�(sh霉)閲忥細1,085
銆�銆�渚涢浕闆诲�擄��1.0V 鏍搁浕澹� / 1.8V 杓斿姪闆诲��

XC6VLX550T-L1FFG1759C 鎻愪緵浜嗗挤(qi谩ng)澶х殑纭�浠惰硣婧愬拰闈堟椿鎬�锛屼娇鍏堕潪甯搁仼鍚堢敤浜庨珮绔�鎳�(y墨ng)鐢�锛�
銆�銆�1. 楂樻�ц兘鏋舵��(g貌u)锛氬熀浜� Virtex-6 骞宠嚭(t谩i)鐨� XC6VLX550T 鎻愪緵浜嗛珮閬�(d谩) 55钀�(w脿n)鍊�(g猫)閭忚集鍠�鍏冿紝鍙�浠ュ��(sh铆)鐝�(xi脿n)寰�(f霉)闆滅殑鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊鍜屾帶鍒堕倧杓�銆�
銆�銆�2. 闆嗘垚鐨� DSP 妯″�婏細鍏�(n猫i)缃� 1,140 鍊�(g猫) DSP48A1 Slice锛屾瘡鍊�(g猫) Slice 鏀�鎸侀珮閬�(d谩) 25x18 鐨勪箻娉曠疮鍔犳搷浣滐紝鑳藉�犳湁鏁堝姞閫熸暩(sh霉)瀛�(xu茅)閬�(y霉n)绠椾换鍕�(w霉)銆�
銆�銆�3. 澶у�归噺瀛樺��(ch菙)璩囨簮锛氬寘鍚� 23.8Mb 鐨勫祵鍏ュ紡 Block RAM 鍜屽垎甯冨紡 RAM锛屽彲鐢ㄤ締(l谩i)妲�(g貌u)寤� FIFO 绶╂矕鍗�(q奴)鎴栧皬鍨嬬珐瀛樸��
銆�銆�4. 楂橀�熶覆琛岄�ｆ帴锛氭敮鎸佸�氭�� GTX 鏀剁櫦(f膩)鍣ㄩ�氶亾锛屾暩(sh霉)鎿�(j霉)鍌宠几閫熺巼鍙�閬�(d谩) 6.5 Gbps锛岄仼鍚堝厜绾栭�氫俊鍜岄珮閫熸帴鍙ｈō(sh猫)瑷�(j矛)銆�
銆�銆�5. 闈堟椿鐨勬檪(sh铆)閻樼�＄悊绯荤��(t菕ng)锛氬寘鎷� PLL 鍜� DCM 妯″��锛屽厑瑷辩簿纰虹敓鎴愬�氬��(g猫)鐛�(d煤)绔嬫檪(sh铆)閻樹俊铏�(h脿o)銆�
銆�銆�6. 鍙�闈犳�у拰瀹夊叏鎬э細鏀�鎸侀儴鍒嗛噸閰嶇疆鍔熻兘锛屽厑瑷卞��(d貌ng)鎱�(t脿i)瑾�(di脿o)鏁� FPGA 鍏�(n猫i)閮ㄩ倧杓�锛屽悓鏅�(sh铆)鎻愪緵鍔犲瘑淇濊��(h霉)姗�(j墨)鍒堕槻姝� IP 娉勯湶銆�
銆�銆�7. 宸ユキ(y猫)绱�(j铆)婧�搴﹁寖鍦嶏細宸ヤ綔婧�搴﹁寖鍦嶇偤 -40掳C 鑷� +100掳C锛岄仼鎳�(y墨ng)鍚勭ó鍤�(y谩n)鑻涚挵(hu谩n)澧冦��

瑭插瀷铏�(h脿o) FPGA 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 閫氫俊瑷�(sh猫)鍌欙細濡傜劇(w煤)绶�(xi脿n)鍩虹珯銆佽矾鐢卞櫒銆佷氦鎻涙��(j墨)绛夐渶瑕侀珮閫熸暩(sh霉)鎿�(j霉)鍌宠几鑸囪檿鐞嗙殑鎳�(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�
銆�銆�2. 鍦栧儚鑸囪�栭牷铏曠悊锛氬��(sh铆)鏅�(sh铆)鍦栧儚澧炲挤(qi谩ng)銆佽�栭牷绶ㄧ⒓瑙ｇ⒓鍙� 3D 鍦栧舰娓叉煋绛夊姛鑳�銆�
銆�銆�3. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栵細姗�(j墨)鍣ㄤ汉鎺у埗绯荤当(t菕ng)銆侀亱(y霉n)鍕�(d貌ng)鎺у埗鍣ㄤ互鍙婂伐妤�(y猫)绱�(j铆) PLC 瑷�(sh猫)鍌�銆�
銆�銆�4. 閱�(y墨)鐧傞浕瀛愶細瓒呰伈娉㈣ê鏂峰剙銆丆T 鎺冩弿鍎�涓�鐨勪俊铏�(h脿o)閲囬泦鑸囪檿鐞嗘ā濉�銆�
銆�銆�5. 楂樻�ц兘瑷�(j矛)绠楋細绉戝��(xu茅)瑷�(j矛)绠椼�佷汉宸ユ櫤鑳芥帹鐞嗗姞閫熷崱銆�
銆�銆�6. 娓�(c猫)瑭︽脯(c猫)閲忥細绀烘尝鍣�銆侀牷璀滃垎鏋愬剙绛夊皪(du矛)绮惧害瑕佹眰妤甸珮鐨勬脯(c猫)瑭﹀剙鍣ㄩ枊(k膩i)鐧�(f膩)銆�

XC6VLX550T-1FFG1759C
銆�銆�XC6VLX550T-2FFG1759C
銆�銆�XC6VLX550T-3FFG1759C