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鍨嬭櫉(h脿o)锛歑C6VLX75T-2FFG484I
銆€銆€绯诲垪锛歋partan-6
銆€銆€瀹舵棌锛歀X
銆€銆€FPGA 閭忚集鍠厓鏁�(sh霉)閲忥細绱� 75000
銆€銆€閰嶇疆闁冨瓨锛氫笉闆嗘垚
銆€銆€RAM 绺介噺锛�1.6Mb
銆€銆€DSP Slice 鏁�(sh霉)閲忥細160
銆€銆€I/O 鏁�(sh霉)閲忥細344
銆€銆€宸ヤ綔婧害鑼冨湇锛氬伐妤�(y猫)绱�(j铆)锛�-40掳C 鑷� +100掳C锛�
銆€銆€灏佽褰㈠紡锛欶FG484锛�484 寮曡叧 Fine Pitch BGA 灏佽锛�
銆€銆€閫熷害绛夌礆(j铆)锛�-2
銆€銆€宸ヨ棟绡€(ji茅)榛�(di菐n)锛�45nm
銆€銆€渚涢浕闆诲锛氭牳蹇冮浕澹� 1.0V锛孖/O 闆诲 1.8V/2.5V/3.3V

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