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XC7A12T-2CPG238C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Artix-7 绯诲垪 FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛変腑鐨勪竴鍊嬪瀷铏�銆侫rtix-7 绯诲垪灞簬 Xilinx 鐨� 7 绯诲垪 FPGA锛屽皥鐐轰綆鍔熻��銆侀珮鎬ц兘鐨勬噳鐢ㄨ�岃ō瑷�锛岄仼鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)銆佽埅绌鸿埅澶╁拰鍦嬮槻绛夐牁鍩�銆傝┎绯诲垪閲囩敤浜� 28nm 鍒剁▼宸ヨ棟锛屽叿鏈夐珮閭忚集瀵嗗害銆佽睈瀵岀殑 DSP 璩囨簮浠ュ強闈堟椿鐨� I/O 鏀寔銆�
銆�銆�XC7A12T 鏄� Artix-7 绯诲垪涓純灏忕殑涓�娆惧櫒浠讹紝鎿佹湁 12,600 鍊嬮倧杓柈鍏�锛岄仼鍚堜腑灏忓瀷瑷▓闋呯洰銆�
鍨嬭櫉锛歑C7A12T-2CPG238C
銆�銆�灏佽锛欳PG238
銆�銆�閫熷害绛夌礆锛�-2
銆�銆�FPGA 绯诲垪锛欰rtix-7
銆�銆�鍒剁▼宸ヨ棟锛�28nm
銆�銆�閭忚集鍠厓鏁�(sh霉)锛�12,600
銆�銆�RAM 瀹归噺锛�440KB
銆�銆�DSP 鐗囨暩(sh霉)锛�20
銆�銆�I/O 鏁�(sh霉)閲忥細238
銆�銆�閰嶇疆妯″紡锛歋electMAP銆丮aster SPI銆丼lave SPI銆丅PI
1. 楂樻�ц兘鑸囦綆鍔熻�楋細
銆�銆�Artix-7 绯诲垪 FPGA 浣跨敤浜� Xilinx 鐨� UltraScale 鏋舵鎶�琛�锛岃兘澶犳彁渚涘崜瓒婄殑鎬ц兘鍚屾檪淇濇寔杓冧綆鐨勫姛鑰楁按骞炽��
銆�銆�2. 璞愬瘜鐨� DSP 璩囨簮锛�
銆�銆�XC7A12T 鍖呭惈 20 鍊� DSP Slice锛屾敮鎸佹诞榛為亱绠楀拰寰╅洔鏁�(sh霉)瀛歌▓绠�锛岄潪甯搁仼鍚堜俊铏熻檿鐞嗘噳鐢�銆�
銆�銆�3. 澶氭ǎ鍖栫殑瀛樺劜璩囨簮锛�
銆�銆�闆嗘垚楂橀仈 440KB 鐨勫 RAM 鍜屽垎甯冨紡 RAM锛屽彲浠ョ敤浜庢暩(sh霉)鎿�(j霉)绶╂矕銆佹煡鎵捐〃鎴栧皬鍨嬪収瀛樼鐞�銆�
銆�銆�4. 闈堟椿鐨� I/O 鏀寔锛�
銆�銆�瑭插櫒浠舵敮鎸佸绋婧栨帴鍙ｅ崝(xi茅)璀帮紝濡� PCIe銆丏DR3銆丩VDS 绛�锛屾豢瓒充笉鍚屾噳鐢ㄥ牬鏅殑闇�姹�銆�
銆�銆�5. 澧炲挤鐨勫畨鍏ㄦ�э細
銆�銆�鍏х疆 AES 鍔犲瘑寮曟搸鍜� RSA 瑾嶈瓑鍔熻兘锛屼繚璀风煡璀樼敘娆婂拰瑷▓瀹夊叏銆�
銆�銆�6. 閰嶇疆閬搁爡璞愬瘜锛�
銆�銆�鏀寔澶氱ó閰嶇疆妯″紡锛屽寘鎷� SelectMAP銆丼PI銆丅PI 绛夛紝渚夸簬鐢ㄦ埗鏍规摎(j霉)瀵﹂殯闇�姹傞伕鎿囨渶鍚堥仼鐨勬柟妗�銆�
1. 宸ユキ(y猫)鑷嫊鍖栵細
銆�銆�鐢ㄤ簬鎺у埗绯荤当(t菕ng)鐨勫鏅傛暩(sh霉)鎿�(j霉)閲囬泦鍜岃檿鐞�锛屾敮鎸佸杌搁亱鍕曟帶鍒跺拰姗熷櫒浜烘噳鐢ㄣ��
銆�銆�2. 閫氫俊瑷倷锛�
銆�銆�閬╃敤浜庣劇绶氬熀绔�銆佸皬鍨嬭渹绐╃恫(w菐ng)绲″拰鍏朵粬閫氫俊鍩虹瑷柦涓殑淇¤櫉铏曠悊浠诲嫏銆�
銆�銆�3. 瑕栭牷鑸囧湒鍍忚檿鐞嗭細
銆�銆�鍙敤浜庤闋荤法瑙ｇ⒓銆佸湒鍍忓寮蜂互鍙婂祵鍏ュ紡瑕栬绯荤当(t菕ng)銆�
銆�銆�4. 娓│鑸囨脯閲忥細
銆�銆�瀵︾従(xi脿n)楂橀�熸暩(sh霉)鎿�(j霉)閲囬泦銆佹尝褰㈢敓鎴愬拰寰╅洔娓│鍎�鍣ㄥ姛鑳姐��
銆�銆�5. 娑堣不椤為浕瀛愮敘鍝侊細
銆�銆�鎳夌敤浜庨煶闋昏檿鐞�銆佹父鎴叉澶栬ō鍜屾櫤鑳藉灞呮帶鍒跺櫒绛夌敘鍝佷腑銆�
XC7A15T-2CPG238C
銆�銆�XC7A25T-2CPG238C
銆�銆�XC7A35T-2CPG238C
