鍨嬭櫉(h脿o)锛歑C7A25T-1CSG325I
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛欰rtix-7
銆�銆�宸ヨ棟鍒剁▼锛�28nm
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱� 24,100 鍊�(g猫)
銆�銆�RAM 瀹归噺锛氱磩 576 KB
銆�銆�DSP Slice 鏁�(sh霉)閲忥細60 鍊�(g猫)
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�256 鍊�(g猫)
銆�銆�灏佽�濋�炲瀷锛欳SG (Ceramic SuperGA)
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C
銆�銆�闆绘簮闆诲�擄��1.0V 鏍稿績闆诲�� / 1.8V I/O 闆诲��

1. XC7A25T-1CSG325I 浣跨敤浜� UltraScale 鏋舵��(g貌u)鎶�琛�(sh霉)锛屽叿鏈夐珮瀵嗗害閭忚集鍠�鍏冨拰鍎�(y艒u)鍖栫殑璺�鐢辫硣婧�锛岃兘澶犳豢瓒冲京(f霉)闆滅畻娉曠殑闇�姹�銆�
銆�銆�2. 鍏�(n猫i)缃� DSP Slice 鏀�鎸侀珮鏁堢殑涔樻硶绱�鍔犻亱(y霉n)绠楋紝閬╁悎鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊浠诲嫏(w霉)銆�
銆�銆�3. 鎻愪緵楂橀仈(d谩) 6.6 Gbps 鐨勯珮閫熶覆琛屾敹鐧�(f膩)鍣ㄦ�ц兘锛岄仼鐢ㄤ簬鏁�(sh霉)鎿�(j霉)瀵嗛泦鍨嬫噳(y墨ng)鐢�銆�
銆�銆�4. 鏀�鎸佸�氱ó鏅�(sh铆)閻樼�＄悊閬搁��(xi脿ng)锛屽寘鎷� PLL 鍜� MMCM锛岀⒑淇濈簿纰虹殑鏅�(sh铆)閻樺垎閰嶈垏鍚屾��銆�
銆�銆�5. 閰嶅倷闈堟椿鐨� I/O 鎺ュ彛锛屽吋瀹瑰�氱ó琛屾��(y猫)妯�(bi膩o)婧�(zh菙n)鍗�(xi茅)璀�锛屽�� PCIe銆丏DR3銆丩VDS 绛�銆�
銆�銆�6. 宓屽叆寮� Block RAM 鍜屽垎甯冨紡 RAM 璩囨簮璞愬瘜锛屽彲瀵�(sh铆)鐝�(xi脿n)寰�(f霉)闆滅殑瀛樺劜(ch菙)绲�(ji茅)妲�(g貌u)瑷�(sh猫)瑷�(j矛)銆�
銆�銆�7. 鏀�鎸侀儴鍒嗛噸閰嶇疆鍔熻��锛屽厑瑷卞湪閬�(y霉n)琛屾檪(sh铆)鍕�(d貌ng)鎱�(t脿i)鏇存柊 FPGA 閰嶇疆锛屾彁鍗囩郴绲�(t菕ng)闈堟椿鎬�銆�
銆�銆�8. 鎻愪緵鍏ㄩ潰鐨勮ō(sh猫)瑷�(j矛)宸ュ叿鏀�鎸侊紝渚嬪�� Vivado Design Suite锛屼究浜庡揩閫熼枊(k膩i)鐧�(f膩)鍜岄��(y脿n)璀夈��

1. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栦腑鐨勫��(sh铆)鏅�(sh铆)鎺у埗鍜屾暩(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)銆�
銆�銆�2. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌欎腑鐨勫湒鍍忚檿鐞嗗拰淇¤櫉(h脿o)鍒嗘瀽銆�
銆�銆�3. 閫氫俊鍩虹��(ch菙)瑷�(sh猫)鏂戒腑鐨勫熀甯惰檿鐞嗗拰鍗�(xi茅)璀拌綁(zhu菐n)鎻�銆�
銆�銆�4. 娑堣不(f猫i)闆诲瓙鐢�(ch菐n)鍝佺殑鍦栧舰鍔犻�熷拰瑕栭牷绶ㄧ⒓瑙ｇ⒓銆�
銆�銆�5. 鑸�绌鸿埅澶╅��(l菒ng)鍩熺殑灏忓瀷鍖栬��(w猫i)鏄熻級鑽峰拰灏�(d菐o)鑸�绯荤��(t菕ng)銆�
銆�銆�6. 娓�(c猫)瑭︽脯(c猫)閲�?j墨)x鍣ㄤ腑鐨勬尝褰㈢敓鎴愬拰淇¤櫉(h脿o)瑾�(di脿o)鐞�銆�
銆�銆�7. 鐗╄伅(li谩n)缍�(w菐ng)閭婄罚瑷�(j矛)绠楃瘈(ji茅)榛�(di菐n)涓�鐨勬��(sh霉)鎿�(j霉)闋�(y霉)铏曠悊鍜屽畨鍏ㄥ姞瀵嗐��

XC7A35T-1CSG324I
銆�銆�XC7A50T-1CSG324I
銆�銆�XC7A100T-1CSG324I