鍨嬭櫉(h脿o)锛歑C7A35T-2CSG324I
銆�銆�FPGA绯诲垪锛欰rtix-7
銆�銆�宸ヨ棟鍒剁▼锛�28nm
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細35K
銆�銆�RAM瀹归噺锛�1.4Mb
銆�銆�DSP Slice鏁�(sh霉)閲忥細90鍊�(g猫)
銆�銆�閰嶇疆妯″紡锛歋electMAP 鍜� Master SPI
銆�銆�I/O寮曡叧鏁�(sh霉)閲忥細226
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銆�銆�灏佽�濆舰寮忥細CSG324
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