鍣ㄤ欢鍨嬭櫉锛歑C7A50T
銆�銆�灏佽�濆舰寮忥細FG484
銆�銆�閫熷害绛夌礆锛�-2
銆�銆�閰嶇疆瀛樺劜鍣ㄩ�炲瀷锛氱劇鐗囧��(n猫i)闁冨瓨锛岄渶澶栨帴閰嶇疆鑺�鐗�
銆�銆�FPGA瀹舵棌锛欰rtix-7
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱�50,640鍊婥LB slices
銆�銆�DSP鍠�鍏冩��(sh霉)閲忥細120鍊婦SP48E1 slices
銆�銆�RAM璩囨簮锛氱磩2.9MB锛堝寘鎷珺RAM鍜屽垎甯冨紡RAM锛�
銆�銆�I/O寮曡叧鏁�(sh霉)锛�334鍊嬬敤鎴跺彲鐢↖/O
銆�銆�鏅傞悩璩囨簮锛氭渶澶�8鍊婱MCM锛圡ixed-Mode Clock Manager锛夊拰4鍊婸LL
銆�銆�閰嶇疆妯″紡锛歋lave Serial (SPI), SelectMAP, Master BPI, etc.
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏細鍟嗘��(y猫)绱氾紙0掳C鑷�85掳C锛夋垨宸ユキ(y猫)绱氾紙-40掳C鑷�100掳C锛�

XC7A50T-2FG484I浣滅偤涓�娆句腑绔�鎬ц兘鐨凢PGA鑺�鐗�锛屽叾涓昏�佺壒鎬у寘鎷�锛�
銆�銆�1. 閲囩敤28nm宸ヨ棟鍒剁▼锛岃兘澶犲湪杓冧綆鍔熻�椾笅瀵︾従(xi脿n)楂樻�ц兘閬嬬畻锛�
銆�銆�2. 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮鍜屽祵鍏ュ紡纭�鏍告ā濉�锛屼緥濡侱SP slices鍜孊RAM锛岄仼鐢ㄤ簬鍚勭ó鏁�(sh霉)瀛椾俊铏熻檿鐞嗗拰鏁�(sh霉)鎿�(j霉)鍌宠几浠诲嫏(w霉)锛�
銆�銆�3. 鏀�鎸侀珮閬�(d谩)鍗冨厗浣嶉�熺巼鐨勬敹鐧�(f膩)鍣�锛屼娇鍏跺彲浠ョ敤浜庨珮閫熶覆琛岄�氫俊鍗�(xi茅)璀�锛�
銆�銆�4. 閰嶅倷闈堟椿鐨勬檪閻樼�＄悊宸ュ叿锛圡MCM鍜孭LL锛夛紝鍙�鐐轰笉鍚屾��(y墨ng)鐢ㄥ牬鏅�鎻愪緵绮剧⒑鐨勬檪閻樹俊铏�锛�
銆�銆�5. FPGA鍏�(n猫i)閮ㄩ泦鎴愪簡澶氱ó鎺ュ彛纭�鏍革紝鏀�鎸佸�侾CI Express銆丒thernet绛夊父瑕嬮�氫俊鍗�(xi茅)璀�锛�
銆�銆�6. 鎻愪緵澶氱ó閰嶇疆妯″紡閬告搰锛岄仼鎳�(y墨ng)涓嶅悓鐨勭郴绲�(t菕ng)鏋舵��(g貌u)闇�姹�锛�
銆�銆�7. 鍙�绶ㄧ▼鎬у挤(qi谩ng)锛屾敮鎸乆ilinx鎻愪緵鐨刅ivado瑷�(sh猫)瑷堝�椾欢閫�(j矛n)琛岄枊鐧�(f膩)锛屾柟渚跨敤鎴跺揩閫熷畬鎴愯ō(sh猫)瑷堟祦绋�銆�

XC7A50T-2FG484I寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宸ユキ(y猫)鑷�鍕曞寲鎺у埗锛氬彲鐢ㄤ簬閬嬪嫊鎺у埗銆佸湒鍍忚檿鐞�銆佸�︽檪鏁�(sh霉)鎿�(j霉)閲囬泦绛夊牬鏅�锛�
銆�銆�2. 閱�(y墨)鐧傝ō(sh猫)鍌欙細濡傝秴鑱叉尝鎴愬儚銆丆T鎺冩弿鍎�涓�鐨勬��(sh霉)鎿�(j霉)铏曠悊閮ㄥ垎锛�
銆�銆�3. 寤ｆ挱瑕栭牷铏曠悊锛氱敤浜庤�栭牷绶ㄧ⒓瑙ｇ��銆佸湒鍍忓�炲��(qi谩ng)绛夊姛鑳斤紱
銆�銆�4. 閫氫俊鍩虹��(ch菙)瑷�(sh猫)鏂斤細鏀�鎸佸皬鍨嬪熀绔�銆佺劇绶氬洖鍌崇瓑閫氫俊瑷�(sh猫)鍌�锛�
銆�銆�5. 娑堣不椤為浕瀛愮敘(ch菐n)鍝侊細濡傞珮绔�椤�绀烘帶鍒跺櫒銆佽櫅鎿�鐝�(xi脿n)瀵﹁ō(sh猫)鍌欎腑鐨勫湒褰㈣檿鐞嗗柈鍏冪瓑锛�
銆�銆�6. 宓屽叆寮忚▓绠楀钩鑷猴細妲�(g貌u)寤哄熀浜嶧PGA鐨勯珮鎬ц兘宓屽叆寮忕郴绲�(t菕ng)銆�

XC7A50T-2CSG324I, XC7A50T-2FFG484I, XC7A50T-3FGG484I