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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XC7K325T-1FBG676I

XC7K325T-1FBG676I 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2023/8/7 16:41:30 鏌ョ湅 闁辫畝锛�328

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�

XC7K325T-1FBG676I

鎻忚堪

IC FPGA 400 I/O 676FCBGA

鍒嗛

闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪)

鐢熺敘(ch菐n)寤犲

Xilinx鍏徃

绯诲垪

Kintex?-7

閮ㄥ垎鐙�鎱�(t脿i)

娲绘��

闆诲-闆绘簮

0.97V~1.03V

宸ヤ綔婧害

-40掳C~100掳C(TJ)

鍖�/绠�

676-BBGA锛孎(xi脿n)CBGA

渚涙噳鍟嗚ō鍌欏寘

676-FCBGA(27x27)

鍩虹(ch菙)閮ㄤ欢铏�

XC7K325T

鐢�(ch菐n)鍝佸湒鐗�

XC7K325T-1FBG676I

XC7K325T-1FBG676I

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍙法绋嬮倧杓鍨�

鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪

绗﹀悎REACH妯欐簴

鏄�

绗﹀悎姝愮洘RoHS妯欐簴

鏄�

鐙�鎱�(t脿i)

娲绘��

鏅傞悩闋荤巼-鏈�澶у��

1098.0 MHz

CLB-Max鐨勭祫鍚堝欢閬�

0.74 ns

JESD-30浠ｇ⒓

S-PBGA-B676

JESD-609浠ｇ⒓

E1

绺絉AM浣嶆暩(sh霉)

16404480

CLB鏁�(sh霉)閲�

25475.0

杓稿叆鏁�(sh霉)閲�

400.0

绲傜鏁�(sh霉)閲�

676

绲勭箶

25475 CLBS

宄板�煎洖娴佹韩搴�(鈩�)

鏈鏄�

闆绘簮

1,1.8,3.3

璩囨牸鐙�鎱�(t脿i)

涓嶅悎鏍�

鍧愬Э楂樺害-鏈�澶�

2.54姣背

瀛愰鍒�

鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪

闆绘簮闆诲

1.0 V

闆绘簮闆诲-鏈�灏忓��

0.97 V

闆绘簮闆诲-鏈�澶у��

1.03 V

瀹夎椤炲瀷

琛ㄩ潰璨艰

鎶�琛�(sh霉)

CMOS

绲傜瀹屾垚

閷�/閵�/閵�(Sn96.5Ag3.0Cu0.5)

绲傜琛ㄦ牸

鐞�

绲傜闁撹窛

1.0姣背

绲傜浣嶇疆

搴曢儴

鏅傞枔@宄板�煎洖娴佹韩搴�-鏈�澶у��(s)

鏈鏄�

闀峰害

27.0姣背

瀵害

27.0姣背

鍖呰楂旀潗鏂�

濉戞枡/鐠�(hu谩n)姘фü鑴�

鍖呰９浠ｇ⒓

BGA676,26X26,40

鍖呰褰㈢媭

寤ｅ牬

鍖呰棰ㄦ牸

缍�(w菐ng)鏍奸櫍鍒�

鍒堕�犲晢鍖呰瑾槑

FBGA-676

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

鐒￠墰鐙�鎱�(t脿i)

鐒￠墰

婵曞害鏁忔劅搴︾瓑绱�(MSL)

4(72灏忔檪)

CAD妯″瀷

XC7K325T-1FBG676I绗﹁櫉

XC7K325T-1FBG676I绗﹁櫉

XC7K325T-1FBG676I鑵冲嵃

XC7K325T-1FBG676I鑵冲嵃

xc7k325t-1fbg676i鎺ㄨ枽渚涙噳鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�
  • 渚涙噳鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児

xc7k325t-1fbg676i鍦栫墖

xc7k325t-1fbg676i

xc7k325t-1fbg676i鍙冩暩(sh霉)

  • 妯欐簴鍖呰1
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛�
  • 绯诲垪Kintex-7
  • LAB/CLB鏁�(sh霉)25475
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)326080
  • RAM 浣嶇附瑷�16404480
  • 杓稿叆/杓稿嚭鏁�(sh霉)250
  • 闁�鏁�(sh霉)-
  • 闆绘簮闆诲0.97 V ~ 1.03 V
  • 瀹夎椤炲瀷*
  • 宸ヤ綔婧害-40°C ~ 100°C
  • 灏佽/澶栨*
  • 渚涙噳鍟嗚ō鍌欏皝瑁�*