鏅傞枔锛�2025/4/23 17:05:22
闁辫畝锛�34
XC7K355T-1FBG676C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Kintex-7 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏�銆傝┎绯诲垪鑺墖閲囩敤浜� 28nm 宸ヨ棟鎶�琛�锛屽叿鏈夐珮鎬ц兘銆佷綆鍔熻�楀拰楂橀泦鎴愬害鐨勭壒榛�銆俋C7K355T 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆佹暩(sh霉)瀛椾俊铏熻檿鐞� (DSP) 妯″浠ュ強瀛樺劜鍣ㄨ硣婧愶紝閬╃敤浜庨�氫俊銆佸唬鎾�佸伐妤�(y猫)鑷嫊鍖�銆侀啱(y墨)鐧傛垚鍍忕瓑闋樺煙鐨勫京闆滆ō瑷堛��
銆�銆�姝ゅ瀷铏熼噰鐢� FBGA676 灏佽锛屾敮鎸佸绋珮閫熸帴鍙ｆ婧�锛屼緥濡� PCIe銆佸崈鍏嗕互澶恫(w菐ng)鍜� Aurora锛屽苟鍏峰倷闈堟椿鐨勬檪閻樼鐞嗚兘鍔�銆傛澶�锛孠intex-7 绯诲垪閭勯�氶亷鍎�(y艒u)鍖栨灦妲嬩締闄嶄綆鍠綅鍔熻��锛屽緸鑰屽湪婊胯冻鎬ц兘瑕佹眰鐨勫悓鏅傛笡灏戞暎鐔卞鍔涖��
鍨嬭櫉锛歑C7K355T
銆�銆�宸ヨ棟锛�28nm
銆�銆�灏佽锛欶BG676
銆�銆�閰嶇疆闁冨瓨锛氫笉鍏�(n猫i)缃�
銆�銆�I/O 鏁�(sh霉)閲忥細504
銆�銆�閭忚集鍠厓锛�354,480
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2,160
銆�銆�Block RAM锛�13.2Mb
銆�銆�鏈�澶у伐浣滈牷鐜囷細绱� 695 MHz
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹� 1.0V锛岃紨鍔╅浕澹� 1.8V/2.5V
銆�銆�鎿嶄綔婧害鑼冨湇锛氬晢妤�(y猫)绱氾紙0掳C 鑷� 100掳C锛�
銆�銆�闈滄厠(t脿i)鍔熻�楋細<1W
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銆�銆�2. 鍏�(n猫i)缃� 2,160 鍊� DSP Slice锛岄仼鍚堢敤浜庨珮鎬ц兘瑷堢畻鍜屼俊铏熻檿鐞嗕换鍕�銆�
銆�銆�3. 鎻愪緵 13.2Mb 鐨勫垎甯冨紡鍜屽鐙�瀛樺劜鍣ㄨ硣婧�锛屽彲闈堟椿閰嶇疆鐐哄悇绋敤閫斻��
銆�銆�4. 鏀寔楂橀仈 28.05Gbps 鐨勪覆琛屾敹鐧�(f膩)鍣ㄩ�熺巼锛岄仼閰嶅绋珮閫熸帴鍙ｉ渶姹傘��
銆�銆�5. 鍙法绋嬫檪閻樼鐞嗘ā濉婏紙MMCM锛�锛屾彁渚涚簿婧栫殑鏅傞悩鍒嗛牷鑸囧�嶉牷鍔熻兘銆�
銆�銆�6. 鍏�(n猫i)缃� Power-over-Ethernet (PoE) 鍜� PCI Express Gen3 绛夐珮绱氬瑷敮鎸併��
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銆�銆�8. 鏀寔閮ㄥ垎閲嶆柊閰嶇疆鍔熻兘锛屽厑瑷卞嫊鎱�(t脿i)瑾�(di脿o)鏁� FPGA 鐨勯儴鍒嗗崁(q奴)鍩熻�屼笉褰遍熆鍏朵粬閮ㄥ垎閬嬭銆�
1. 閫氫俊鍩虹瑷柦锛氬鍩虹珯銆佽矾鐢卞櫒銆佷氦鎻涙绛夎ō鍌欎腑鐨勬暩(sh霉)鎿�(j霉)鍖呰檿鐞嗗拰鍗�(xi茅)璀拌綁鎻�銆�
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XC7K325T-2FFG676C
銆�銆�XC7K410T-2FFG676C
銆�銆�XC7K355T-2FBG676C
